Changeset da7d770 in mainline


Ignore:
Timestamp:
2005-09-02T18:29:28Z (19 years ago)
Author:
Jakub Vana <jakub.vana@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e4a6dda
Parents:
bc1089a
Message:

Serialization of psr write

Location:
arch/ia64/src
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • arch/ia64/src/cpu/cpu.c

    rbc1089a rda7d770  
    1515
    1616    int *p=&IVT;
    17    
    1817    volatile __u64 hlp,hlp2;
    1918
    2019
    2120    int psr = 0x2000;
     21   
    2222
    2323        __asm__  volatile (
    24                 "mov r15 = %0;;"
    25                 "mov cr2 = r15;;"
    26                 "mov psr.l = %1;;"
     24                "mov cr2 = %0;;\n"
     25                "mov psr.l = %1;;\n"
     26                "srlz.i;"
     27                "srlz.d;;"
    2728                :
    2829                : "r" (p), "r" (psr)
    29                 : "r15"
    3030        );
    3131
    … …  
    3333
    3434        /*Switch register bank of regs r16 .. r31 to 1 It is automaticly cleared on exception*/
    35         __asm__ volatile ("bsw.1;;");             
     35        __asm__ volatile
     36        (
     37            "bsw.1;;\n"
     38        );             
    3639       
    3740

  • arch/ia64/src/start.S

    rbc1089a rda7d770  
    3535        .auto
    3636        # initialize PSR
    37         mov psr.l = r0
     37        mov psr.l = r0;;
     38        srlz.i;
     39        srlz.d;;
    3840       
    3941        # initialize register stack
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