Changeset bf677f6 in mainline


Ignore:
Timestamp:
2013-11-11T21:17:25Z (11 years ago)
Author:
Jakub Klama <jakub.klama@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
9426f7c4
Parents:
679dc0c
Message:

Implement dummy atomics.

Location:
uspace/lib/c/arch/sparc32
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • uspace/lib/c/arch/sparc32/include/libarch/atomic.h

    r679dc0c rbf677f6  
    3838#define LIBC_ARCH_ATOMIC_H_
    3939
     40#define CAS
     41
    4042#include <atomicdflt.h>
    4143#include <sys/types.h>
    4244
     45static inline bool cas(atomic_t *val, atomic_count_t ov, atomic_count_t nv)
     46{
     47        if (val->count == ov) {
     48                val->count = nv;
     49                return true;
     50        }
     51       
     52        return false;
     53}
     54
     55static inline void atomic_inc(atomic_t *val) {
     56        /* On real hardware the increment has to be done
     57           as an atomic action. */
     58       
     59        val->count++;
     60}
     61
     62static inline void atomic_dec(atomic_t *val) {
     63        /* On real hardware the decrement has to be done
     64           as an atomic action. */
     65       
     66        val->count++;
     67}
     68
     69static inline atomic_count_t atomic_postinc(atomic_t *val)
     70{
     71        /* On real hardware both the storing of the previous
     72           value and the increment have to be done as a single
     73           atomic action. */
     74       
     75        atomic_count_t prev = val->count;
     76       
     77        val->count++;
     78        return prev;
     79}
     80
     81static inline atomic_count_t atomic_postdec(atomic_t *val)
     82{
     83        /* On real hardware both the storing of the previous
     84           value and the decrement have to be done as a single
     85           atomic action. */
     86       
     87        atomic_count_t prev = val->count;
     88       
     89        val->count--;
     90        return prev;
     91}
     92
     93#define atomic_preinc(val) (atomic_postinc(val) + 1)
     94#define atomic_predec(val) (atomic_postdec(val) - 1)
     95
     96#if 0
    4397/** Atomic add operation.
    4498 *
     
    102156        (void) atomic_add(val, -1);
    103157}
     158#endif
    104159
    105160#endif
  • uspace/lib/c/arch/sparc32/include/libarch/syscall.h

    r679dc0c rbf677f6  
    2727 */
    2828
    29 /** @addtogroup libcsparc64
     29/** @addtogroup libcsparc32
    3030 * @{
    3131 */
     
    3333 */
    3434
    35 #ifndef LIBC_sparc64_SYSCALL_H_
    36 #define LIBC_sparc64_SYSCALL_H_
     35#ifndef LIBC_sparc32_SYSCALL_H_
     36#define LIBC_sparc32_SYSCALL_H_
    3737
    3838#include <sys/types.h>
  • uspace/lib/c/arch/sparc32/src/fibril.S

    r679dc0c rbf677f6  
    3939        # should a thread switch occur.
    4040        #
    41 # XXX   CONTEXT_SAVE_ARCH_CORE %o0
     41        CONTEXT_SAVE_ARCH_CORE %o0
    4242        retl
    4343        mov 1, %o0              ! context_save_arch returns 1
     
    5353#       flushw
    5454       
    55 # XXX   CONTEXT_RESTORE_ARCH_CORE %o0
     55        CONTEXT_RESTORE_ARCH_CORE %o0
    5656        retl
    5757        xor %o0, %o0, %o0       ! context_restore_arch returns 0
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