Changeset acee917 in mainline


Ignore:
Timestamp:
2009-01-04T22:51:09Z (15 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
59b2adb
Parents:
0e56eb1a
Message:

Do not compile unnecessary code when CONFIG_SMP is not configured on ia64.

Location:
kernel/arch/ia64/src
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia64/src/smp/smp.c

    r0e56eb1a racee917  
    7474static void ipi_broadcast_arch_all(int ipi)
    7575{
    76         int id,eid;
     76        int id, eid;
    7777        int myid, myeid;
    7878       
     
    8888void ipi_broadcast_arch(int ipi )
    8989{
    90         int id,eid;
    91         int myid,myeid;
     90        int id, eid;
     91        int myid, myeid;
    9292       
    9393        myid = ia64_get_cpu_id();
     
    107107       
    108108        /*
    109          * If we have not system prepared by hello, we are not able to start
     109         * If we have not got system prepared by hello, we are not able to start
    110110         * AP's. This means we are running on a simulator.
    111111         */
     
    130130void kmp(void *arg __attribute__((unused)))
    131131{
    132         int id,eid;
     132        int id, eid;
    133133        int myid, myeid;
    134134       
     
    166166#endif
    167167
    168 
    169 #ifndef CONFIG_SMP
    170 
    171 /* This is just a hack for linking with assembler - may be removed in future. */
    172 void main_ap(void);
    173 void main_ap(void)
    174 {
    175         while(1)
    176                 ;
    177 }
    178 
    179 #endif
    180 
    181168/** @}
    182169 */
  • kernel/arch/ia64/src/start.S

    r0e56eb1a racee917  
    5050        .auto
    5151
     52#ifdef CONFIG_SMP
    5253        # Identify self(CPU) in OS structures by ID / EID
    5354
     
    6061        add r8 = r8, r9
    6162        st1 [r8] = r10
     63#endif
    6264
    6365        mov psr.l = r0
     
    8082        mov cr.ifa = r8
    8183
    82         mov r11 = cr.itir ;;
    83         movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT);;
    84         or r10 = r10, r11 ;;
    85         mov cr.itir = r10;;
     84        mov r11 = cr.itir
     85        movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT)
     86        or r10 = r10, r11
     87        mov cr.itir = r10
    8688
    8789        movl r10 = (KERNEL_TRANSLATION_I)
     
    9698        itr.d dtr[r7] = r10
    9799
    98         mov r11 = cr.itir ;;
    99         movl r10 = ~0xfc;;
    100         and r10 = r10, r11 ;;
    101         movl r11 = (IO_PAGE_WIDTH << PS_SHIFT);;
    102         or r10 = r10, r11 ;;
    103         mov cr.itir = r10;;
     100        mov r11 = cr.itir
     101        movl r10 = ~0xfc
     102        and r10 = r10, r11
     103        movl r11 = (IO_PAGE_WIDTH << PS_SHIFT)
     104        or r10 = r10, r11
     105        mov cr.itir = r10
    104106
    105107        movl r7 = 2
     
    111113        # Setup mapping for fimware arrea (also SAPIC)
    112114
    113         mov r11 = cr.itir ;;
    114         movl r10 = ~0xfc;;
    115         and r10 = r10, r11 ;;
    116         movl r11 = (FW_PAGE_WIDTH << PS_SHIFT);;
    117         or r10 = r10, r11 ;;
    118         mov cr.itir = r10;;
     115        mov r11 = cr.itir
     116        movl r10 = ~0xfc
     117        and r10 = r10, r11
     118        movl r11 = (FW_PAGE_WIDTH << PS_SHIFT)
     119        or r10 = r10, r11
     120        mov cr.itir = r10
    119121
    120122        movl r7 = 3
     
    143145         * fill the upper half word of PSR.
    144146         */
    145         rfi;;
     147        rfi ;;
    146148
    147149
     
    156158        bsw.1
    157159
     160#ifdef CONFIG_SMP
    158161        # Am I BSP or AP?
    159         movl r20 = bsp_started;;
    160         ld8 r20 = [r20];;
    161         cmp.eq p3, p2 = r20, r0;;
     162        movl r20 = bsp_started ;;
     163        ld8 r20 = [r20] ;;
     164        cmp.eq p3, p2 = r20, r0 ;;
     165#else
     166        cmp.eq p3, p2 = r0, r0 ;;       /* you are BSP */
     167#endif  /* CONFIG_SMP */
    162168       
    163169        # Initialize register stack
     
    196202        srlz.d ;;
    197203
     204#ifdef CONFIG_SMP
    198205(p2)    movl r18 = main_ap ;;
    199206(p2)    mov b1 = r18 ;;
     
    201208
    202209        # Mark that BSP is on
    203         mov r20=1;;
    204         movl r21=bsp_started;;
    205         st8 [r21]=r20;;
     210        mov r20 = 1 ;;
     211        movl r21 = bsp_started ;;
     212        st8 [r21] = r20 ;;
     213#endif
    206214
    207215        br.call.sptk.many b0 = arch_pre_main
     
    2132210:
    214222        br 0b
     223
     224#ifdef CONFIG_SMP
     225
    215226.align 4096
    216 
    217227kernel_image_ap_start:
    218228        .auto
     
    230240       
    231241        # Wait for wakeup synchro signal (#3 in cpu_by_id_eid_list)
     242       
    232243kernel_image_ap_start_loop:
    233244        movl r11 = kernel_image_ap_start_loop
     
    235246        mov b1 = r11
    236247
    237         ld1 r20 = [r8];;
    238         movl r21 = 3;;
    239         cmp.eq p2, p3 = r20, r21;;
     248        ld1 r20 = [r8] ;;
     249        movl r21 = 3 ;;
     250        cmp.eq p2, p3 = r20, r21 ;;
    240251(p3)    br.call.sptk.many b0 = b1
    241252
     
    245256        br.call.sptk.many b0 = b1
    246257
    247 
    248258.align 16
    249259.global bsp_started
     
    256266.space 65536
    257267
     268#endif  /* CONFIG_SMP */
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