Changeset a7372ccf in mainline


Ignore:
Timestamp:
2013-11-17T21:27:39Z (10 years ago)
Author:
Jakub Klama <jakub.klama@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
3bc42bd
Parents:
a3b034b
Message:

Fix sparc64-isms, like 64-bit register widths and stack bias.

Location:
uspace/lib/c/arch/sparc32
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • uspace/lib/c/arch/sparc32/include/libarch/fibril.h

    ra3b034b ra7372ccf  
    4646                (c)->pc = ((uintptr_t) _pc) - 8; \
    4747                (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), \
    48                     STACK_ALIGNMENT) - (STACK_BIAS + SP_DELTA); \
    49                 (c)->fp = -STACK_BIAS; \
     48                    STACK_ALIGNMENT) - (SP_DELTA); \
     49                (c)->fp = 0; \
    5050                (c)->tp = (uint32_t) ptls; \
    5151        } while (0)
    … …  
    5858        uintptr_t sp;           /* %o6 */
    5959        uintptr_t pc;           /* %o7 */
    60         uint64_t i0;
    61         uint64_t i1;
    62         uint64_t i2;
    63         uint64_t i3;
    64         uint64_t i4;
    65         uint64_t i5;
     60        uint32_t i0;
     61        uint32_t i1;
     62        uint32_t i2;
     63        uint32_t i3;
     64        uint32_t i4;
     65        uint32_t i5;
    6666        uintptr_t fp;           /* %i6 */
    6767        uintptr_t i7;
    68         uint64_t l0;
    69         uint64_t l1;
    70         uint64_t l2;
    71         uint64_t l3;
    72         uint64_t l4;
    73         uint64_t l5;
    74         uint64_t l6;
    75         uint64_t l7;
    76         uint64_t tp;            /* %g7 */
     68        uint32_t l0;
     69        uint32_t l1;
     70        uint32_t l2;
     71        uint32_t l3;
     72        uint32_t l4;
     73        uint32_t l5;
     74        uint32_t l6;
     75        uint32_t l7;
     76        uint32_t tp;            /* %g7 */
    7777} context_t;
    7878
    7979static inline uintptr_t context_get_fp(context_t *ctx)
    8080{
    81         return ctx->sp + STACK_BIAS;
     81        return ctx->sp;
    8282}
    8383

  • uspace/lib/c/arch/sparc32/include/libarch/stack.h

    ra3b034b ra7372ccf  
    3939
    4040/** According to SPARC Compliance Definition, every stack frame is 16-byte aligned. */
    41 #define STACK_ALIGNMENT                 16
     41#define STACK_ALIGNMENT                 8
    4242
    4343/**
    … …  
    5151#define STACK_ARG_SAVE_AREA_SIZE                (6 * STACK_ITEM_SIZE)
    5252
    53 /**
    54  * By convention, the actual top of the stack is %sp + STACK_BIAS.
    55  */
    56 #define STACK_BIAS            2047
    57 
    5853#endif
    5954

  • uspace/lib/c/arch/sparc32/src/stacktrace.c

    ra3b034b ra7372ccf  
    5757        rc = (*st->read_uintptr)(st->op_arg, fp + FRAME_OFFSET_FP_PREV, &bprev);
    5858        if (rc == EOK)
    59                 *prev = bprev + STACK_BIAS;
     59                *prev = bprev;
    6060        return rc;
    6161}

  • uspace/lib/c/arch/sparc32/src/stacktrace_asm.S

    ra3b034b ra7372ccf  
    4545        # Add the stack bias to %sp to get the actual address.
    4646        retl
    47         add %sp, STACK_BIAS, %o0
     47        mov %sp, %o0
    4848
    4949stacktrace_pc_get:
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