Changeset a4be38d in mainline

Timestamp:

2005-11-12T22:23:30Z (19 years ago)

Author:

Jakub Vana <jakub.vana@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

35667f8

Parents:

30187eb

Message:

Revert of =m in ia32 atomic operations. In according to gcc docs +m should be right but as Jakub said it is not working
with amd64 but =m is… and I'm not able to build tools for that platform to test it now . (Maybe bug in gcc ???)

File:

• arch/ia32/include/atomic.h (modified) (5 diffs)

arch/ia32/include/atomic.h

@@ -36 +36 @@
 static inline void atomic_inc(atomic_t *val) {
 #ifdef CONFIG_SMP
-        __asm__ volatile ("lock incl %0\n" : "+m" (*val));
+        __asm__ volatile ("lock incl %0\n" : "=m" (*val));
 #else
-        __asm__ volatile ("incl %0\n" : "+m" (*val));
+        __asm__ volatile ("incl %0\n" : "=m" (*val));
 #endif /* CONFIG_SMP */
 }
@@ -44 +44 @@
 static inline void atomic_dec(atomic_t *val) {
 #ifdef CONFIG_SMP
-        __asm__ volatile ("lock decl %0\n" : "+m" (*val));
+        __asm__ volatile ("lock decl %0\n" : "=m" (*val));
 #else
-        __asm__ volatile ("decl %0\n" : "+m" (*val));
+        __asm__ volatile ("decl %0\n" : "=m" (*val));
 #endif /* CONFIG_SMP */
 }
@@ -56 +56 @@
                 "movl $1,%0;"
                 "lock xaddl %0,%1;"
-                : "=r"(r), "+m" (*val)
+                : "=r"(r), "=m" (*val)
         );
         return r;
@@ -69 +69 @@
                 "movl $-1,%0;"
                 "lock xaddl %0,%1;"
-                : "=r"(r), "+m" (*val)
+                : "=r"(r), "=m" (*val)
         );
         return r;
@@ -85 +85 @@
                 "movl $1, %0\n"
                 "xchgl %0, %1\n"
-                : "=r" (v),"+m" (*val)
+                : "=r" (v),"=m" (*val)
         );