Changes in uspace/drv/bus/usb/uhci/hc.h [7de1988c:9f6cb910] in mainline
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uspace/drv/bus/usb/uhci/hc.h
r7de1988c r9f6cb910 36 36 #define DRV_UHCI_HC_H 37 37 38 #include <ddf/interrupt.h>39 38 #include <device/hw_res_parsed.h> 40 39 #include <fibril.h> 40 #include <macros.h> 41 #include <stdbool.h> 42 #include <sys/types.h> 41 43 #include <usb/host/hcd.h> 44 #include <usb/host/usb_transfer_batch.h> 42 45 46 #include "uhci_rh.h" 43 47 #include "transfer_list.h" 48 #include "hw_struct/link_pointer.h" 44 49 45 50 /** UHCI I/O registers layout */ 46 51 typedef struct uhci_regs { 47 52 /** Command register, controls HC behaviour */ 48 uint16_t usbcmd;53 ioport16_t usbcmd; 49 54 #define UHCI_CMD_MAX_PACKET (1 << 7) 50 55 #define UHCI_CMD_CONFIGURE (1 << 6) … … 57 62 58 63 /** Status register, 1 means interrupt is asserted (if enabled) */ 59 uint16_t usbsts;64 ioport16_t usbsts; 60 65 #define UHCI_STATUS_HALTED (1 << 5) 61 66 #define UHCI_STATUS_PROCESS_ERROR (1 << 4) … … 68 73 69 74 /** Interrupt enabled registers */ 70 uint16_t usbintr;75 ioport16_t usbintr; 71 76 #define UHCI_INTR_SHORT_PACKET (1 << 3) 72 77 #define UHCI_INTR_COMPLETE (1 << 2) … … 75 80 76 81 /** Register stores frame number used in SOF packet */ 77 uint16_t frnum;82 ioport16_t frnum; 78 83 79 84 /** Pointer(physical) to the Frame List */ 80 uint32_t flbaseadd;85 ioport32_t flbaseadd; 81 86 82 87 /** SOF modification to match external timers */ 83 uint8_t sofmod; 88 ioport8_t sofmod; 89 90 PADD8[3]; 91 ioport16_t ports[]; 84 92 } uhci_regs_t; 85 93 86 94 #define UHCI_FRAME_LIST_COUNT 1024 87 #define UHCI_INT_EMULATOR_TIMEOUT 1000088 95 #define UHCI_DEBUGER_TIMEOUT 5000000 89 96 #define UHCI_ALLOWED_HW_FAIL 5 90 #define UHCI_NEEDED_IRQ_COMMANDS 591 97 92 98 /** Main UHCI driver structure */ 93 99 typedef struct hc { 94 /** Generic HCD driver structure */ 95 hcd_t generic; 96 100 uhci_rh_t rh; 97 101 /** Addresses of I/O registers */ 98 102 uhci_regs_t *registers; … … 112 116 /** Pointer table to the above lists, helps during scheduling */ 113 117 transfer_list_t *transfers[2][4]; 114 /** Fibril periodically checking status register*/115 fid_t interrupt_emulator;116 118 /** Indicator of hw interrupts availability */ 117 119 bool hw_interrupts; … … 121 123 } hc_t; 122 124 123 int hc_register_irq_handler(ddf_dev_t *, addr_range_t *, int, 124 interrupt_handler_t); 125 int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t, 126 addr_range_t *); 127 void hc_interrupt(hc_t *instance, uint16_t status); 128 int hc_init(hc_t *instance, addr_range_t *regs, bool interupts); 125 int hc_init(hc_t *instance, const hw_res_list_parsed_t *hw_res, bool interupts); 126 void hc_fini(hc_t *instance); 129 127 130 /** Safely dispose host controller internal structures 131 * 132 * @param[in] instance Host controller structure to use. 133 */ 134 static inline void hc_fini(hc_t *instance) {} /* TODO: implement*/ 128 int uhci_hc_gen_irq_code(irq_code_t *code, const hw_res_list_parsed_t *hw_res); 129 130 void uhci_hc_interrupt(hcd_t *hcd, uint32_t status); 131 int uhci_hc_status(hcd_t *hcd, uint32_t *status); 132 int uhci_hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch); 133 135 134 #endif 136 135
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