Changeset 9f63a83 in mainline

Timestamp:

2007-01-19T12:21:27Z (17 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

718d600

Parents:

81cfefa

Message:

Beat the implicit illegal virtual alias created by reusing userspace frames.
In the anonymous and ELF backends, if the architecture has virtually indexed D-cache,
selectively flush cachelines belonging to the frame being freed.
This fixes Ticket #20.

Location:

kernel

Files:

• arch/sparc64/include/mm/cache.h (modified) (1 diff)
• arch/sparc64/src/mm/cache_asm.S (modified) (2 diffs)
• generic/src/mm/backend_anon.c (modified) (3 diffs)
• generic/src/mm/backend_elf.c (modified) (3 diffs)

kernel/arch/sparc64/include/mm/cache.h

@@ -36 +36 @@
 #define KERN_sparc64_CACHE_H_
 
+#include <mm/page.h>
+#include <mm/frame.h>
+
+#define dcache_flush_page(p) \
+        dcache_flush_color(PAGE_COLOR((p)))
+#define dcache_flush_frame(p, f) \
+        dcache_flush_tag(PAGE_COLOR((p)), ADDR2PFN((f)));
+
 extern void dcache_flush(void);
+extern void dcache_flush_color(int c);
+extern void dcache_flush_tag(int c, pfn_t tag);
 
 #endif

kernel/arch/sparc64/src/mm/cache_asm.S

@@ -29 +29 @@
 #include <arch/arch.h>
 
-#define DCACHE_SIZE             (16*1024)
+#define DCACHE_SIZE             (16 * 1024)
 #define DCACHE_LINE_SIZE        32      
 
+#define DCACHE_TAG_SHIFT        2
+
+.register %g2, #scratch
+.register %g3, #scratch
+
+/** Flush the whole D-cache. */
 .global dcache_flush
 dcache_flush:
@@ -43 +49 @@
         membar #Sync
 
+/** Flush only D-cache lines of one virtual color.
+ *
+ * @param o0    Virtual color to be flushed.
+ */
+.global dcache_flush_color
+dcache_flush_color:
+        mov (DCACHE_SIZE / DCACHE_LINE_SIZE) / 2, %g1
+        set DCACHE_SIZE / 2, %g2
+        sllx %g2, %o0, %g2
+        sub %g2, DCACHE_LINE_SIZE, %g2
+0:      stxa %g0, [%g2] ASI_DCACHE_TAG
+        membar #Sync
+        subcc %g1, 1, %g1
+        bnz,pt %xcc, 0b
+        sub %g2, DCACHE_LINE_SIZE, %g2
+        retl
+        nop
+
+/** Flush only D-cache lines of one virtual color and one tag.
+ *
+ * @param o0    Virtual color to lookup the tag.
+ * @param o1    Tag of the cachelines to be flushed.
+ */
+.global dcache_flush_tag
+dcache_flush_tag:
+        mov (DCACHE_SIZE / DCACHE_LINE_SIZE) / 2, %g1
+        set DCACHE_SIZE / 2, %g2
+        sllx %g2, %o0, %g2
+        sub %g2, DCACHE_LINE_SIZE, %g2
+0:      ldxa [%g2] ASI_DCACHE_TAG, %g3
+        srlx %g3, DCACHE_TAG_SHIFT, %g3
+        cmp %g3, %o1
+        bnz 1f
+        nop
+        stxa %g0, [%g2] ASI_DCACHE_TAG
+        membar #Sync
+1:      subcc %g1, 1, %g1
+        bnz,pt %xcc, 0b
+        sub %g2, DCACHE_LINE_SIZE, %g2
+        retl
+        nop

kernel/generic/src/mm/backend_anon.c

@@ -51 +51 @@
 #include <align.h>
 #include <arch.h>
+
+#ifdef CONFIG_VIRT_IDX_DCACHE
+#include <arch/mm/cache.h>
+#endif
 
 static int anon_page_fault(as_area_t *area, uintptr_t addr, pf_access_t access);
@@ -154 +158 @@
  *
  * @param area Ignored.
- * @param page Ignored.
+ * @param page Virtual address of the page corresponding to the frame.
  * @param frame Frame to be released.
  */
@@ -160 +164 @@
 {
         frame_free(frame);
+#ifdef CONFIG_VIRT_IDX_DCACHE
+        dcache_flush_frame(page, frame);
+#endif
 }
 

kernel/generic/src/mm/backend_elf.c

@@ -51 +51 @@
 #include <arch.h>
 
+#ifdef CONFIG_VIRT_IDX_DCACHE
+#include <arch/mm/cache.h>
+#endif
+
 static int elf_page_fault(as_area_t *area, uintptr_t addr, pf_access_t access);
 static void elf_frame_free(as_area_t *area, uintptr_t page, uintptr_t frame);
@@ -220 +224 @@
                          */
                         frame_free(frame);
+#ifdef CONFIG_VIRT_IDX_DCACHE
+                        dcache_flush_frame(page, frame);
+#endif
                 }
         } else {
@@ -228 +235 @@
                  */
                 frame_free(frame); 
+#ifdef CONFIG_VIRT_IDX_DCACHE
+                dcache_flush_frame(page, frame);
+#endif
         }
 }