Changes in kernel/arch/ia32/src/smp/apic.c [7e752b2:99718a2e] in mainline
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kernel/arch/ia32/src/smp/apic.c
r7e752b2 r99718a2e 72 72 * 73 73 */ 74 volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000);75 volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000);74 volatile uint32_t *l_apic = (uint32_t *) 0xfee00000; 75 volatile uint32_t *io_apic = (uint32_t *) 0xfec00000; 76 76 77 77 uint32_t apic_id_mask = 0; … … 184 184 * Other interrupts will be forwarded to the lowest priority CPU. 185 185 */ 186 io_apic_disable_irqs(0xffff U);186 io_apic_disable_irqs(0xffff); 187 187 188 188 irq_initialize(&l_apic_timer_irq); … … 477 477 { 478 478 #ifdef LAPIC_VERBOSE 479 printf("LVT on cpu% u, LAPIC ID: %" PRIu8 "\n",479 printf("LVT on cpu%" PRIs ", LAPIC ID: %" PRIu8 "\n", 480 480 CPU->id, l_apic_id()); 481 481
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