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  • boot/arch/arm32/src/asm.S

    ra35b458 r98c4c16  
    3232.section BOOTSTRAP
    3333
     34#define CP15_C1_U               22
     35#define CP15_C1_IC              12
     36#define CP15_C1_BP              11
     37#define CP15_C1_DC              2
     38
    3439SYMBOL(start)
     40
     41#ifdef PROCESSOR_ARCH_armv6
     42        /*
     43         * Enable unaligned doubleword memory accesses (STRD/LDRD) if the
     44         * processor supports it. Note that that boils down to ARMv6 processors
     45         * only as the older architectures require doubleword alignment and
     46         * ARMv7 always assumes the U bit is 1.
     47         */
     48        mrc     p15, 0, r0, c1, c0, 0
     49        orr     r0, r0, #(1 << CP15_C1_U)
     50        mcr     p15, 0, r0, c1, c0, 0
     51#endif
     52
    3553        ldr sp, =boot_stack
    3654        b bootstrap
     
    5977        # r0 is kernel entry point
    6078        # r1 is pointer to the bootinfo structure
    61 
    62 #define CP15_C1_IC              12
    63 #define CP15_C1_BP              11
    64 #define CP15_C1_DC              2
    65 
    6679
    6780#ifndef PROCESSOR_ARCH_armv7_a
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