Changes in kernel/arch/sparc64/include/trap/interrupt.h [95c4776:965dc18] in mainline

File:

• kernel/arch/sparc64/include/trap/interrupt.h (modified) (4 diffs)

kernel/arch/sparc64/include/trap/interrupt.h

@@ -32 +32 @@
 /** 
  * @file
- * @brief This file contains level N interrupt and inter-processor interrupt
- * trap handler.
+ * @brief This file contains interrupt vector trap handler.
  */
-#ifndef KERN_sparc64_INTERRUPT_TRAP_H_
-#define KERN_sparc64_INTERRUPT_TRAP_H_
+
+#ifndef KERN_sparc64_TRAP_INTERRUPT_H_
+#define KERN_sparc64_TRAP_INTERRUPT_H_
+
+#include <arch/trap/trap_table.h>
+#include <arch/stack.h>
+
+/* IMAP register bits */
+#define IGN_MASK        0x7c0
+#define INO_MASK        0x1f
+#define IMAP_V_MASK     (1ULL << 31)
+
+#define IGN_SHIFT       6
+
+
+/* Interrupt ASI registers. */
+#define ASI_INTR_W                      0x77
+#define ASI_INTR_DISPATCH_STATUS        0x48
+#define ASI_INTR_R                      0x7f
+#define ASI_INTR_RECEIVE                0x49
+
+/* VA's used with ASI_INTR_W register. */
+#if defined (US)
+#define ASI_UDB_INTR_W_DATA_0   0x40
+#define ASI_UDB_INTR_W_DATA_1   0x50
+#define ASI_UDB_INTR_W_DATA_2   0x60
+#elif defined (US3)
+#define VA_INTR_W_DATA_0        0x40
+#define VA_INTR_W_DATA_1        0x48
+#define VA_INTR_W_DATA_2        0x50
+#define VA_INTR_W_DATA_3        0x58
+#define VA_INTR_W_DATA_4        0x60
+#define VA_INTR_W_DATA_5        0x68
+#define VA_INTR_W_DATA_6        0x80
+#define VA_INTR_W_DATA_7        0x88
+#endif
+#define VA_INTR_W_DISPATCH      0x70
+
+/* VA's used with ASI_INTR_R register. */
+#if defined(US)
+#define ASI_UDB_INTR_R_DATA_0   0x40
+#define ASI_UDB_INTR_R_DATA_1   0x50
+#define ASI_UDB_INTR_R_DATA_2   0x60
+#elif defined (US3)
+#define VA_INTR_R_DATA_0        0x40
+#define VA_INTR_R_DATA_1        0x48
+#define VA_INTR_R_DATA_2        0x50
+#define VA_INTR_R_DATA_3        0x58
+#define VA_INTR_R_DATA_4        0x60
+#define VA_INTR_R_DATA_5        0x68
+#define VA_INTR_R_DATA_6        0x80
+#define VA_INTR_R_DATA_7        0x88
+#endif
+
+/* Shifts in the Interrupt Vector Dispatch virtual address. */
+#define INTR_VEC_DISPATCH_MID_SHIFT     14
+
+/* Bits in the Interrupt Dispatch Status register. */
+#define INTR_DISPATCH_STATUS_NACK       0x2
+#define INTR_DISPATCH_STATUS_BUSY       0x1
 
 #define TT_INTERRUPT_LEVEL_1                    0x41
@@ -54 +111 @@
 #define TT_INTERRUPT_LEVEL_15                   0x4f
 
+#define TT_INTERRUPT_VECTOR_TRAP                0x60
+
 #define INTERRUPT_LEVEL_N_HANDLER_SIZE          TRAP_TABLE_ENTRY_SIZE
-
-/* IMAP register bits */
-#define IGN_MASK        0x7c0
-#define INO_MASK        0x1f
-#define IMAP_V_MASK     (1ULL << 31)
-
-#define IGN_SHIFT       6
-
+#define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE      TRAP_TABLE_ENTRY_SIZE
 
 #ifdef __ASM__
@@ -69 +121 @@
         PREEMPTIBLE_HANDLER exc_dispatch
 .endm
-#endif
+
+.macro INTERRUPT_VECTOR_TRAP_HANDLER
+        PREEMPTIBLE_HANDLER interrupt
+.endm
+#endif /* __ASM__ */
 
 #ifndef __ASM__
@@ -78 +134 @@
 #endif /* !def __ASM__ */
 
-
-#if defined (SUN4U)
-#include <arch/trap/sun4u/interrupt.h>
-#elif defined (SUN4V)
-#include <arch/trap/sun4v/interrupt.h>
-#endif
-
 #endif