Changeset 8b4d6cb in mainline


Ignore:
Timestamp:
2009-01-03T15:33:55Z (15 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
2b70a6e
Parents:
fb69f39
Message:

More of ia64 cleanup.

Location:
kernel/arch/ia64/include
Files:
10 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/ia64/include/asm.h

    rfb69f39 r8b4d6cb  
    4444#define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
    4545
    46 static inline void  outb(ioport_t port,uint8_t v)
    47 {
    48         *((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
    49 
    50         asm volatile ("mf\n" ::: "memory");
    51 }
    52 
    53 static inline void  outw(ioport_t port,uint16_t v)
    54 {
    55         *((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
    56 
    57         asm volatile ("mf\n" ::: "memory");
    58 }
    59 
    60 static inline void  outl(ioport_t port,uint32_t v)
    61 {
    62         *((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
    63 
    64         asm volatile ("mf\n" ::: "memory");
    65 }
    66 
    67 
     46static inline void  outb(ioport_t port, uint8_t v)
     47{
     48        *((uint8_t *)(IA64_IOSPACE_ADDRESS +
     49            ((port & 0xfff) | ((port >> 2) << 12)))) = v;
     50
     51        asm volatile ("mf\n" ::: "memory");
     52}
     53
     54static inline void  outw(ioport_t port, uint16_t v)
     55{
     56        *((uint16_t *)(IA64_IOSPACE_ADDRESS +
     57            ((port & 0xfff) | ((port >> 2) << 12)))) = v;
     58
     59        asm volatile ("mf\n" ::: "memory");
     60}
     61
     62static inline void  outl(ioport_t port, uint32_t v)
     63{
     64        *((uint32_t *)(IA64_IOSPACE_ADDRESS +
     65            ((port & 0xfff) | ((port >> 2) << 12)))) = v;
     66
     67        asm volatile ("mf\n" ::: "memory");
     68}
    6869
    6970static inline uint8_t inb(ioport_t port)
    … …  
    7172        asm volatile ("mf\n" ::: "memory");
    7273
    73         return *((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
     74        return *((uint8_t *)(IA64_IOSPACE_ADDRESS +
     75            ((port & 0xfff) | ((port >> 2) << 12))));
    7476}
    7577
    … …  
    7880        asm volatile ("mf\n" ::: "memory");
    7981
    80         return *((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xffE) | ( (port >> 2) << 12 ))));
     82        return *((uint16_t *)(IA64_IOSPACE_ADDRESS +
     83            ((port & 0xffE) | ((port >> 2) << 12))));
    8184}
    8285
    … …  
    8588        asm volatile ("mf\n" ::: "memory");
    8689
    87         return *((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
    88 }
    89 
    90 
     90        return *((uint32_t *)(IA64_IOSPACE_ADDRESS +
     91            ((port & 0xfff) | ((port >> 2) << 12))));
     92}
    9193
    9294/** Return base address of current stack
    … …  
    343345extern void asm_delay_loop(uint32_t t);
    344346
    345 extern void switch_to_userspace(uintptr_t entry, uintptr_t sp, uintptr_t bsp, uintptr_t uspace_uarg, uint64_t ipsr, uint64_t rsc);
     347extern void switch_to_userspace(uintptr_t, uintptr_t, uintptr_t, uintptr_t,
     348    uint64_t, uint64_t);
    346349
    347350#endif

  • kernel/arch/ia64/include/atomic.h

    rfb69f39 r8b4d6cb  
    3838/** Atomic addition.
    3939 *
    40  * @param val Atomic value.
    41  * @param imm Value to add.
     40 * @param val           Atomic value.
     41 * @param imm           Value to add.
    4242 *
    43  * @return Value before addition.
     43 * @return              Value before addition.
    4444 */
    4545static inline long atomic_add(atomic_t *val, int imm)
    … …  
    4747        long v;
    4848
    49         asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm));
     49        asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v),
     50            "+m" (val->count) : "i" (imm));
    5051 
    5152        return v;
    … …  
    5758               
    5859        asm volatile (
    59                 "movl %0=0x01;;\n"
    60                 "xchg8 %0=%1,%0;;\n"
    61                 : "=r" (v),"+m" (val->count)
     60                "movl %0 = 0x01;;\n"
     61                "xchg8 %0 = %1, %0;;\n"
     62                : "=r" (v), "+m" (val->count)
    6263        );
    6364       
    … …  
    6667
    6768
    68 static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
    69 static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
     69static inline void atomic_inc(atomic_t *val)
     70{
     71        atomic_add(val, 1);
     72}
    7073
    71 static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
    72 static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
     74static inline void atomic_dec(atomic_t *val)
     75{
     76        atomic_add(val, -1);
     77}
    7378
    74 static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
    75 static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
     79static inline long atomic_preinc(atomic_t *val)
     80{
     81        return atomic_add(val, 1) + 1;
     82}
     83
     84static inline long atomic_predec(atomic_t *val)
     85{
     86        return atomic_add(val, -1) - 1;
     87}
     88
     89static inline long atomic_postinc(atomic_t *val)
     90{
     91        return atomic_add(val, 1);
     92}
     93
     94static inline long atomic_postdec(atomic_t *val)
     95{
     96        return atomic_add(val, -1);
     97}
    7698
    7799#endif

  • kernel/arch/ia64/include/bootinfo.h

    rfb69f39 r8b4d6cb  
    6969        unsigned int wakeup_intno;
    7070        int hello_configured;
    71 
    7271} bootinfo_t;
    7372

  • kernel/arch/ia64/include/cpu.h

    rfb69f39 r8b4d6cb  
    8484
    8585
    86 
    87 static inline void ipi_send_ipi(int id,int eid,int intno)
     86static inline void ipi_send_ipi(int id, int eid, int intno)
    8887{
    89         (bootinfo->sapic)[2*(id*256+eid)]=intno;
     88        (bootinfo->sapic)[2 * (id * 256 + eid)] = intno;
    9089        srlz_d();
    9190
    9291}
    93 
    94 
    9592
    9693#endif

  • kernel/arch/ia64/include/debug.h

    rfb69f39 r8b4d6cb  
    11/*
    2  * Copyright (c) 2005
     2 * Copyright (c) 2005 Ondrej Palkovsky
    33 * All rights reserved.
    44 *

  • kernel/arch/ia64/include/interrupt.h

    rfb69f39 r8b4d6cb  
    5454#define VECTOR_TLB_SHOOTDOWN_IPI 0xf0
    5555#define INTERRUPT_TIMER         255
    56 #define IRQ_KBD                 (0x01+LEGACY_INTERRUPT_BASE)
    57 #define IRQ_MOUSE               (0x0c+LEGACY_INTERRUPT_BASE)
     56#define IRQ_KBD                 (0x01 + LEGACY_INTERRUPT_BASE)
     57#define IRQ_MOUSE               (0x0c + LEGACY_INTERRUPT_BASE)
    5858#define INTERRUPT_SPURIOUS      15
    5959#define LEGACY_INTERRUPT_BASE   0x20
    … …  
    118118        /*
    119119         * The following variables are defined only for break_instruction
    120          * handler. 
     120         * handler.
    121121         */
    122122        uint64_t in0;
    … …  
    154154extern void disabled_fp_register(uint64_t vector, istate_t *istate);
    155155
    156 
    157156#endif
    158157

  • kernel/arch/ia64/include/mm/page.h

    rfb69f39 r8b4d6cb  
    5252
    5353
    54 
    55 /** Staticly mapped IO spaces - offsets to 0xe...00 of virtual adresses
    56 becauce of "minimal virtual bits implemented is 51"
    57 it is possible to have here values up to 0x0007000000000000
    58 */
     54/*
     55 * Statically mapped IO spaces - offsets to 0xe...00 of virtual addresses
     56 * because of "minimal virtual bits implemented is 51" it is possible to
     57 * have values up to 0x0007000000000000
     58 */
    5959
    6060/* Firmware area (bellow 4GB in phys mem) */
    … …  
    6262/* Legacy IO space */
    6363#define IO_OFFSET             0x0001000000000000
    64 /* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000*/
     64/* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000 */
    6565#define VIO_OFFSET            0x0002000000000000
    66 
    67 
    6866
    6967
    … …  
    8280#define REGION_REGISTERS                8
    8381
    84 #define KA2PA(x)        ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT)))
    85 #define PA2KA(x)        ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT)))
     82#define KA2PA(x)        ((uintptr_t) (x - (VRN_KERNEL << VRN_SHIFT)))
     83#define PA2KA(x)        ((uintptr_t) (x + (VRN_KERNEL << VRN_SHIFT)))
    8684
    8785#define VHPT_WIDTH                      20      /* 1M */

  • kernel/arch/ia64/include/mm/vhpt.h

    rfb69f39 r8b4d6cb  
    4545        vhpt_entry_t ventry;
    4646       
    47         ventry.word[0]=tentry.word[0];
    48         ventry.word[1]=tentry.word[1];
     47        ventry.word[0] = tentry.word[0];
     48        ventry.word[1] = tentry.word[1];
    4949       
    5050        return ventry;

  • kernel/arch/ia64/include/proc/task.h

    rfb69f39 r8b4d6cb  
    4444
    4545
    46 #define task_create_arch(t) {(t)->arch.iomap=NULL;}
     46#define task_create_arch(t) { (t)->arch.iomap = NULL; }
    4747#define task_destroy_arch(t)
    4848

  • kernel/arch/ia64/include/register.h

    rfb69f39 r8b4d6cb  
    4141#define PSR_PK_MASK     0x8000
    4242
    43 #define PSR_DT_MASK     (1<<17)
    44 #define PSR_RT_MASK     (1<<27)
    45 
    46 #define PSR_DFL_MASK    (1<<18)
    47 #define PSR_DFH_MASK    (1<<19)
     43#define PSR_DT_MASK     (1 << 17)
     44#define PSR_RT_MASK     (1 << 27)
     45
     46#define PSR_DFL_MASK    (1 << 18)
     47#define PSR_DFH_MASK    (1 << 19)
    4848
    4949#define PSR_IT_MASK     0x0000001000000000
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