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arch/sparc64/include/asm.h

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+}
+/** Read Trap Base Address register.
+ *
+ * @return Current value in TBA.
+ */
+static inline __u64 tba_read(void)
+{
+        __u64 v;
+        __asm__ volatile ("rdpr %%tba, %0\n" : "=r" (v));
+        return v;
+}
+/** Write Trap Base Address register.
+ *
+ * @param New value of TBA.
+ */
+static inline void tba_write(__u64 v)
+{
+        __asm__ volatile ("wrpr %0, %1, %%tba\n" : : "r" (v), "i" (0));
+}
 void cpu_halt(void);
 void cpu_sleep(void);

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 /**
  * Both context_save_arch() and context_restore_arch() are
+ * leaf-optimized procedures. Both of them touch %sp and
+ * %fp and thus break SCD 2.4 compliance. However, these
+ * functions are special enough to be allowed this
+ * kind of behavior. Moreover, this kind of optimization
+ * is very important and prevents any window spill/
+ * fill/clean traps in these very core kernel functions.
+ * leaf-optimized procedures. This kind of optimization
+ * is very important and prevents any implicit window
+ * spill/fill/clean traps in these very core kernel
+ * functions.
  */

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 #include <arch.h>
+#include <print.h>
+#include <arch/asm.h>
+#include <memstr.h>
+#include <arch/trap_table.h>
 void arch_pre_mm_init(void)
 …
 void arch_pre_smp_init(void)
+{
+        /*
+         * Copy OFW's trap table into kernel and point TBA there.
+         */
+        memcpy((void *) trap_table, (void *) tba_read(), TRAP_TABLE_SIZE);
+/*
+ *      TBA cannot be changed until there are means of getting it into TLB.
+ *      tba_write((__u64) trap_table);
+ */
+}

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 :
         set ofw, %l0
-        stx %o4, [%l0]
         call ofw_init
         nop
+        stx %o4, [%l0]
         call main_bsp

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