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Changeset 70259a55 in mainline


Ignore:
Timestamp:
2018-09-11T21:01:08Z (4 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial
Children:
e38ff16
Parents:
d2c91ab
Message:

ia64: Use appropriate imm21 operand with BREAK

This commit changes the imm21 used with the BREAK instruction to conform
to the IA-64 Software Conventions and Runtime Architecture Guide. This
is necessary to be able to distinguish syscalls from compiler-generated
calls to architected software interrupts (e.g. integer divide by zero).

In order to be able to test the used immediate in break_instruction(),
we extend istate_t to hold the CR.IIM register.

Files:
4 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia64/include/arch/istate_struct.h

    rd2c91ab r70259a55  
    7272#define ISTATE_OFFSET_CR_IPSR           0x230
    7373#define ISTATE_OFFSET_CR_IIP            0x238
    74 #define ISTATE_OFFSET_PR                0x240
    75 #define ISTATE_OFFSET_SP                0x248
    76 #define ISTATE_OFFSET_IN0               0x250
    77 #define ISTATE_OFFSET_IN1               0x258
    78 #define ISTATE_OFFSET_IN2               0x260
    79 #define ISTATE_OFFSET_IN3               0x268
    80 #define ISTATE_OFFSET_IN4               0x270
    81 #define ISTATE_OFFSET_IN5               0x278
    82 #define ISTATE_OFFSET_IN6               0x280
     74#define ISTATE_OFFSET_CR_IIM            0x240
     75#define ISTATE_OFFSET_PR                0x248
     76#define ISTATE_OFFSET_SP                0x250
     77#define ISTATE_OFFSET_IN0               0x258
     78#define ISTATE_OFFSET_IN1               0x260
     79#define ISTATE_OFFSET_IN2               0x268
     80#define ISTATE_OFFSET_IN3               0x270
     81#define ISTATE_OFFSET_IN4               0x278
     82#define ISTATE_OFFSET_IN5               0x280
     83#define ISTATE_OFFSET_IN6               0x288
    8384#define ISTATE_SIZE                     0x290
    8485
     
    138139        psr_t cr_ipsr;
    139140        uintptr_t cr_iip;
     141        uint64_t cr_iim;
    140142        uint64_t pr;
    141143        uintptr_t sp;
  • kernel/arch/ia64/src/interrupt.c

    rd2c91ab r70259a55  
    195195}
    196196
     197
     198#define BREAK_IMM_SYSCALL       0x40000U
     199
    197200/** Handle syscall. */
    198201sysarg_t break_instruction(unsigned int n, istate_t *istate)
    199202{
    200203        sysarg_t ret;
     204
     205        if (istate->cr_iim != BREAK_IMM_SYSCALL) {
     206                fault_if_from_uspace(istate, "Unknown software interrupt: %x",
     207                    (uint32_t) istate->cr_iim);
     208                panic_badtrap(istate, n, "Interruption: %#hx (%s).",
     209                    (uint16_t) n, vector_to_string(n));
     210        }
    201211
    202212        /*
  • kernel/arch/ia64/src/ivt.S

    rd2c91ab r70259a55  
    186186        st8 [r31] = r29, -STACK_ITEM_SIZE ;;    /* save predicate registers */
    187187
     188        mov r29 = cr.iim ;;
     189        st8 [r31] = r29, -STACK_ITEM_SIZE ;;    /* save cr.iim */
     190
    188191        st8 [r31] = r24, -STACK_ITEM_SIZE ;;    /* save cr.iip */
    189192        st8 [r31] = r25, -STACK_ITEM_SIZE ;;    /* save cr.ipsr */
     
    274277        ld8 r25 = [r31], +STACK_ITEM_SIZE ;;    /* load cr.ipsr */
    275278        ld8 r24 = [r31], +STACK_ITEM_SIZE ;;    /* load cr.iip */
     279        ld8 r29 = [r31], +STACK_ITEM_SIZE ;;    /* load cr.iim */
    276280
    277281        mov cr.iip = r24;;
     
    279283        mov cr.isr = r27
    280284        mov cr.ifa = r28
     285        mov cr.iim = r29
    281286
    282287        /* Set up FPU as in exception. */
  • uspace/lib/c/arch/ia64/src/syscall.S

    rd2c91ab r70259a55  
    2929#include <abi/asmtool.h>
    3030
    31 /**
    32  * Immediate operand for break instruction.
    33  * Be carefull about the value as Ski simulator
    34  * is somewhat sensitive to its value.
     31/*
     32 * IA-64 Software Conventions and Runtime Architecture Guide mandates that
     33 * the zero-extended imm21 operand of the BREAK instruction is used as follows:
    3534 *
    36  * 0 will be confused with Ski breakpoint.
    37  * And higher values will be confused with SSC's.
     35 * MSB | Purpose
     36 * ----+--------
     37 * 000 | Reserved for architected software interrupts
     38 * 001 | Available for application use as software interrupts
     39 * 01x | Reserved for debugger breakpoints
     40 * 1xx | Reserved for definition by each ABI
    3841 */
    39 #define SYSCALL_IMM     1
     42#define SYSCALL_IMM     0x40000
    4043
    4144FUNCTION_BEGIN(__syscall)
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