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Changeset 6c6a95d2 in mainline


Ignore:
Timestamp:
2011-05-06T15:46:44Z (11 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master
Children:
1ce4189, 3b543d5, 78dbf5b, ba17f5b
Parents:
075c1eb (diff), 9350e837 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Add support for some ATi OHCI chipsets, fix spurious reboot on startup

Location:
uspace/drv
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/ehci-hcd/ehci-hcd.ma

    r075c1eb r6c6a95d2  
    2210 pci/ven=1002&dev=4386
    3310 pci/ven=1002&dev=4396
     410 pci/ven=1002&dev=4373
    4510 pci/ven=1022&dev=7463
    5610 pci/ven=1022&dev=7808
  • uspace/drv/ohci/hc.c

    r075c1eb r6c6a95d2  
    334334{
    335335        assert(instance);
     336        usb_log_debug("Requesting OHCI control.\n");
    336337        /* Turn off legacy emulation */
    337338        volatile uint32_t *ohci_emulation_reg =
     
    339340        usb_log_debug("OHCI legacy register %p: %x.\n",
    340341                ohci_emulation_reg, *ohci_emulation_reg);
    341         *ohci_emulation_reg = 0;
     342        *ohci_emulation_reg &= ~0x1;
    342343
    343344        /* Interrupt routing enabled => smm driver is active */
  • uspace/drv/ohci/ohci.ma

    r075c1eb r6c6a95d2  
    1110 pci/ven=106b&dev=003f
    2210 pci/ven=10de&dev=0aa5
    3 10 pci/ven=10de&dev=0aa5
     3
     410 pci/ven=1002&dev=4374
     510 pci/ven=1002&dev=4375
     6
     710 pci/ven=1002&dev=4387
     810 pci/ven=1002&dev=4388
     910 pci/ven=1002&dev=4389
     1010 pci/ven=1002&dev=438a
     1110 pci/ven=1002&dev=438b
  • uspace/drv/ohci/pci.c

    r075c1eb r6c6a95d2  
    4646
    4747#include "pci.h"
    48 
    49 #define PAGE_SIZE_MASK 0xfffff000
    50 
    51 #define HCC_PARAMS_OFFSET 0x8
    52 #define HCC_PARAMS_EECP_MASK 0xff
    53 #define HCC_PARAMS_EECP_OFFSET 8
    54 
    55 #define CMD_OFFSET 0x0
    56 #define CONFIGFLAG_OFFSET 0x40
    57 
    58 #define USBCMD_RUN 1
    59 
    60 #define USBLEGSUP_OFFSET 0
    61 #define USBLEGSUP_BIOS_CONTROL (1 << 16)
    62 #define USBLEGSUP_OS_CONTROL (1 << 24)
    63 #define USBLEGCTLSTS_OFFSET 4
    64 
    65 #define DEFAULT_WAIT 10000
    66 #define WAIT_STEP 10
    6748
    6849/** Get address of registers and IRQ for given device.
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