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  • uspace/drv/nic/rtl8139/defs.h

    r321052f7 r5cd3d67  
    2929/** @file rtl8139_defs.h
    3030 *
    31  *  Registers, bit positions and masks definition of the RTL8139 network family
    32  *  cards
    33  */
    34 
    35 #ifndef RTL8139_DEFS_H_INCLUDED_
    36 #define RTL8139_DEFS_H_INCLUDED_
     31 * Registers, bit positions and masks definition
     32 * of the RTL8139 network family cards
     33 */
     34
     35#ifndef RTL8139_DEFS_H_
     36#define RTL8139_DEFS_H_
     37
    3738#include <sys/types.h>
    3839#include <libarch/ddi.h>
    3940
    40 
    41 /** The size of RTL8139 registers address space */
    42 #define RTL8139_IO_SIZE 256
    43 
    44 /** The maximal transmitted frame length in bytes allowed according to RTL8139
    45  *  documentation (see SIZE part of TSD documentation)
    46  */
    47 #define RTL8139_FRAME_MAX_LENGTH 1792
    48 
     41/** Size of RTL8139 registers address space */
     42#define RTL8139_IO_SIZE  256
     43
     44/** Maximal transmitted frame length
     45 *
     46 * Maximal transmitted frame length in bytes
     47 * allowed according to the RTL8139 documentation
     48 * (see SIZE part of TSD documentation).
     49 *
     50 */
     51#define RTL8139_FRAME_MAX_LENGTH  1792
    4952
    5053/** HW version
    5154 *
    52  *  as can be detected from HWVERID part of TCR
    53  *  (Transmit Configuration Register)
    54  */
    55 enum rtl8139_version_id {
     55 * As can be detected from HWVERID part of TCR
     56 * (Transmit Configuration Register).
     57 *
     58 */
     59typedef enum {
    5660        RTL8139 = 0,          /**< RTL8139 */
    5761        RTL8139A,             /**< RTL8139A */
     
    6670        RTL8101,              /**< RTL8101 */
    6771        RTL8139_VER_COUNT     /**< Count of known RTL versions, the last value */
    68 };
    69 
    70 extern const char* model_names[RTL8139_VER_COUNT];
     72} rtl8139_version_id_t;
    7173
    7274/** Registers of RTL8139 family card offsets from the memory address base */
     
    7577        MAC0  = IDR0,    /**< Alias for IDR0 */
    7678
    77         // 0x6 - 0x7 reserved
     79        // 0x06 - 0x07 reserved
    7880
    7981        MAR0    = 0x08,  /**< Multicast mask registers 8 1b registers sequence */
     
    213215        pio_write_8(io_base + CR9346, RTL8139_REGS_LOCKED);
    214216}
     217
    215218/** Allow to change Config0-4 and BMCR register  */
    216219static inline void rtl8139_regs_unlock(void *io_base)
     
    417420
    418421/** Maximal runt frame size + 1 */
    419 #define RTL8139_RUNT_MAX_SIZE 64
     422#define RTL8139_RUNT_MAX_SIZE  64
    420423
    421424/** Bits in frame header */
     
    470473
    471474/** Mapping of HW version -> version ID */
    472 struct rtl8139_hwver_map { 
    473         uint32_t hwverid;                /**< HW version value in the register */
    474         enum rtl8139_version_id ver_id;  /**< appropriate version id */
     475struct rtl8139_hwver_map {
     476        uint32_t hwverid;             /**< HW version value in the register */
     477        rtl8139_version_id_t ver_id;  /**< appropriate version id */
    475478};
    476479
    477480/** Mapping of HW version -> version ID */
    478481extern const struct rtl8139_hwver_map rtl8139_versions[RTL8139_VER_COUNT + 1];
     482extern const char* model_names[RTL8139_VER_COUNT];
    479483
    480484/** Size in the frame header while copying from RxFIFO to Rx buffer */
    481 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0)
     485#define RTL8139_EARLY_SIZE  UINT16_C(0xfff0)
     486
    482487/** The only supported pause frame time value */
    483 #define RTL8139_PAUSE_VAL UINT16_C(0xFFFF)
     488#define RTL8139_PAUSE_VAL  UINT16_C(0xFFFF)
    484489
    485490/** Size of the frame header in front of the received frame */
    486 #define RTL_FRAME_HEADER_SIZE 4
     491#define RTL_FRAME_HEADER_SIZE  4
    487492
    488493/** 8k buffer */
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