Changeset 5b65205 in mainline

Timestamp:

2005-11-08T11:53:45Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

389f41e

Parents:

6bc4dbd

Message:

ia64 work.
Add missing srlz_d().
Remove extra stops.
Coding style cleanups.

Location:

arch/ia64/src

Files:

• drivers/it.c (modified) (2 diffs)
• ivt.S (modified) (5 diffs)

arch/ia64/src/drivers/it.c

@@ -46 +46 @@
         itv.m = 0;
         itv_write(itv.value);
-        srlz_d();
 
         /* set Interval Timer Counter to zero */
         itc_write(0);
-        srlz_d();
         
         /* generate first Interval Timer interrupt in IT_DELTA ticks */
         itm_write(IT_DELTA);
+
+        /* propagate changes */
         srlz_d();
 }
@@ -62 +62 @@
         eoi_write(EOI);
         itm_write(itc_read() + IT_DELTA);       /* program next interruption */
+        srlz_d();                               /* propagate changes */
         clock();
 }

arch/ia64/src/ivt.S

@@ -47 +47 @@
  * Some steps are not fully supported yet (e.g. interruptions
  * from userspace and floating-point context).
+ *
+ * @param offs Offset from the beginning of IVT.
+ * @param handler Interrupt handler address.
  */
 .macro HEAVYWEIGHT_HANDLER offs handler
@@ -101 +104 @@
         st8 [r31] = r27, -8     /* save ar.rnat */
         st8 [r31] = r28, -8     /* save ar.bspstore */
-        st8 [r31] = r29         /* save ar.bsp */
+        st8 [r31] = r29, -8     /* save ar.bsp */
         
         mov ar.rsc = r24        /* restore RSE's setting */
@@ -256 +259 @@
 heavyweight_handler_finalize:
     /* 16. RSE switch to interrupted context */
-
-/********************************************************************************************/
-
-
-
         .auto
-        cover                   /*Allocate zerro size frame (Step 1(from Intel Docs))*/
+        cover                   /* allocate zerro size frame (step 1 (from Intel Docs)) */
 
         add r31 = STACK_SCRATCH_AREA_SIZE, r12
 
-        mov r28 = ar.bspstore   /*Calculate loadrs (step 2)*/
-        ld8 r29 = [r31], +8     
+        mov r28 = ar.bspstore   /* calculate loadrs (step 2) */
+        ld8 r29 = [r31], +8     /* load ar.bsp */
         sub r27 = r29 , r28
         shl r27 = r27, 16
@@ -276 +274 @@
         mov ar.rsc = r24        /* place RSE in enforced lazy mode */
 
-
-
-        loadrs                  /*(Step 3)*/
-
-
-                                /*Read saved registers*/
-        ld8 r28 = [r31], +8     /*ar.bspstore*/
-        ld8 r27 = [r31], +8     /*ar.rnat*/
-        ld8 r26 = [r31], +8     /*cr.ifs*/
-        ld8 r25 = [r31], +8     /*ar.pfs*/
-        ld8 r24 = [r31], +8     /*ar.rsc*/
-
-
-        mov ar.bspstore = r28   /*(Step 4)*/
-        mov ar.rnat = r27       /*(Step 5)*/
-
-        mov ar.pfs = r25        /*(Step 6)*/
+        loadrs                  /* (step 3) */
+
+        ld8 r28 = [r31], +8     /* load ar.bspstore */
+        ld8 r27 = [r31], +8     /* load ar.rnat */
+        ld8 r26 = [r31], +8     /* load cr.ifs */
+        ld8 r25 = [r31], +8     /* load ar.pfs */
+        ld8 r24 = [r31], +8     /* load ar.rsc */
+
+        mov ar.bspstore = r28   /* (step 4) */
+        mov ar.rnat = r27       /* (step 5) */
+
+        mov ar.pfs = r25        /* (step 6) */
         mov cr.ifs = r26        
 
-        mov ar.rsc = r24        /*(Step 7)*/
-
-
+        mov ar.rsc = r24        /* (step 7) */
         .explicit       
 
-
-/********************************************************************************************/
-
-
-
     /* 17. restore interruption state from memory stack */
-
-        ld8 r28 = [r31] , +8 ;; /* load cr.ifa */               
-        ld8 r27 = [r31] , +8 ;; /* load cr.isr */
-        ld8 r26 = [r31] , +8 ;; /* load cr.iipa */
-        ld8 r25 = [r31] , +8 ;; /* load cr.ipsr */
-        ld8 r24 = [r31] , +8 ;; /* load cr.iip */
-
+        ld8 r28 = [r31], +8 ;;  /* load cr.ifa */               
+        ld8 r27 = [r31], +8 ;;  /* load cr.isr */
+        ld8 r26 = [r31], +8 ;;  /* load cr.iipa */
+        ld8 r25 = [r31], +8 ;;  /* load cr.ipsr */
+        ld8 r24 = [r31], +8 ;;  /* load cr.iip */
 
         mov cr.iip = r24
@@ -320 +304 @@
         mov cr.ifa = r28
 
-
-        
     /* 18. restore predicate registers from memory stack */
-
-
         ld8 r29 = [r31] , -8 ;; /* load predicate registers */
-        mov pr =r29 ;;
-        
-        add r12 = STACK_FRAME_SIZE,r12;;
+        mov pr = r29
         
     /* 19. return from interruption */
-        rfi;;
-
+        add r12 = STACK_FRAME_SIZE, r12
+        rfi ;;
 
 dump_gregs: