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Changeset 58297955 in mainline


Ignore:
Timestamp:
2012-03-04T20:15:50Z (10 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master
Children:
b0e58c7
Parents:
3da753e
Message:

arm32, amdm37x Implement simple pic driver.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/genarch/include/drivers/amdm37x_irc/amdm37x_irc.h

    r3da753e r58297955  
    4040#define AMDM37x_IRC_BASE_ADDRESS 0x4820000
    4141#define AMDM37x_IRC_SIZE 4096
     42
     43#define AMDM37x_IRC_IRQ_COUNT 96
    4244
    4345#include <typedefs.h>
     
    104106} amdm37x_irc_regs_t;
    105107
    106 #endif
    107108
    108109static inline void amdm37x_irc_init(amdm37x_irc_regs_t *regs)
    109110{
    110         /* AMDM37x TRM */
    111         //program sysconfig
    112         //program idle
    113         //program ilr[m] assign priority, decide fiq
    114         //program mir[n] enable interrupts (mir_set)
     111        /* AMDM37x TRM sec 12.5.1 p. 2425 */
     112
     113        /* Program system config register */
     114        //TODO enable this when you know the meaning
     115        //regs->sysconfig |= AMDM37x_IRC_SYSCONFIG_AUTOIDLE_FLAG;
     116
     117        /* Program idle register */
     118        //TODO enable this when you know the meaning
     119        //regs->sysconfig |= AMDM37x_IRC_IDLE_TURBO_FLAG;
     120
     121        /* Program ilr[m] assign priority, decide fiq */
     122        for (unsigned i = 0; i < AMDM37x_IRC_IRQ_COUNT; ++i) {
     123                regs->ilr[i] = 0; /* highest prio(default) route to irq */
     124        }
     125
     126        /* Disable all interrupts */
     127        regs->interrupts[0].mir_clear = 0xffffffff;
     128        regs->interrupts[1].mir_clear = 0xffffffff;
     129        regs->interrupts[2].mir_clear = 0xffffffff;
    115130}
     131
     132static inline unsigned amdm37x_irc_inum_get(amdm37x_irc_regs_t *regs)
     133{
     134        return regs->sir_irq & AMDM37x_IRC_SIR_IRQ_ACTIVEIRQ_MASK;
     135}
     136
     137static inline void amdm37x_irc_irq_ack(amdm37x_irc_regs_t *regs)
     138{
     139        regs->control = AMDM37x_IRC_CONTROL_NEWIRQAGR_FLAG;
     140}
     141
     142static inline void amdm37x_irc_fiq_ack(amdm37x_irc_regs_t *regs)
     143{
     144        regs->control = AMDM37x_IRC_CONTROL_NEWFIQAGR_FLAG;
     145}
     146
     147static inline void amdm37x_irc_enable(amdm37x_irc_regs_t *regs, unsigned inum)
     148{
     149        ASSERT(inum < AMDM37x_IRC_IRQ_COUNT);
     150        const unsigned set = inum / 32;
     151        const unsigned pos = inum % 32;
     152        regs->interrupts[set].mir_set = (1 << pos);
     153}
     154
     155static inline void amdm37x_irc_disable(amdm37x_irc_regs_t *regs, unsigned inum)
     156{
     157        ASSERT(inum < AMDM37x_IRC_IRQ_COUNT);
     158        const unsigned set = inum / 32;
     159        const unsigned pos = inum % 32;
     160        regs->interrupts[set].mir_clear = (1 << pos);
     161}
     162
     163#endif
    116164
    117165/**
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