Changeset 571addd in mainline


Ignore:
Timestamp:
2010-07-27T21:42:47Z (14 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
69a60c4
Parents:
5a9f4d7 (diff), 1720cf9 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge from lp:~jsvoboda/helenos/gta02.

Files:
4 added
17 edited

Legend:

Unmodified
Added
Removed
  • HelenOS.config

    r5a9f4d7 r571addd  
    441441! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32&MACHINE=gta02] CONFIG_S3C24XX_UART (y/n)
    442442
     443% Support for Samsung S3C24XX on-chip interrupt controller
     444! [PLATFORM=arm32&MACHINE=gta02] CONFIG_S3C24XX_IRQC (y)
     445
    443446% Support for Z8530 controller
    444447! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=keyboard)&PLATFORM=sparc64&MACHINE=generic] CONFIG_Z8530 (y/n)
     
    469472
    470473% Serial line input module
    471 ! [CONFIG_DSRLNIN=y|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)|(PLATFORM=sparc64&MACHINE=serengeti&CONFIG_SGCN_KBD=y)|(PLATFORM=sparc64&PROCESSOR=sun4v)] CONFIG_SRLN (y)
     474! [CONFIG_DSRLNIN=y|(PLATFORM=arm32&MACHINE=gta02)|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)|(PLATFORM=sparc64&MACHINE=serengeti&CONFIG_SGCN_KBD=y)|(PLATFORM=sparc64&PROCESSOR=sun4v)] CONFIG_SRLN (y)
    472475
    473476% EGA support
  • boot/arch/arm32/Makefile.inc

    r5a9f4d7 r571addd  
    4141PAGE_SIZE = 4096
    4242
    43 RD_SRVS_ESSENTIAL +=
     43RD_SRVS_ESSENTIAL += \
     44        $(USPACE_PATH)/srv/hw/char/s3c24xx_uart/s3c24ser
    4445
    4546RD_SRVS_NON_ESSENTIAL += \
  • kernel/arch/arm32/include/mach/integratorcp/integratorcp.h

    r5a9f4d7 r571addd  
    105105extern void icp_get_memory_extents(uintptr_t *, uintptr_t *);
    106106extern void icp_frame_init(void);
     107extern size_t icp_get_irq_count(void);
    107108
    108109extern struct arm_machine_ops icp_machine_ops;
  • kernel/arch/arm32/include/mach/testarm/testarm.h

    r5a9f4d7 r571addd  
    7373extern void gxemul_get_memory_extents(uintptr_t *, uintptr_t *);
    7474extern void gxemul_frame_init(void);
     75extern size_t gxemul_get_irq_count(void);
    7576
    7677extern struct arm_machine_ops gxemul_machine_ops;
  • kernel/arch/arm32/include/machine_func.h

    r5a9f4d7 r571addd  
    5555        void (*machine_output_init)(void);
    5656        void (*machine_input_init)(void);
     57        size_t (*machine_get_irq_count)(void);
    5758};
    5859
  • kernel/arch/arm32/src/mach/gta02/gta02.c

    r5a9f4d7 r571addd  
    4343#include <genarch/drivers/s3c24xx_irqc/s3c24xx_irqc.h>
    4444#include <genarch/drivers/s3c24xx_timer/s3c24xx_timer.h>
     45#include <genarch/srln/srln.h>
     46#include <sysinfo/sysinfo.h>
    4547#include <interrupt.h>
    4648#include <ddi/ddi.h>
     
    6870static void gta02_output_init(void);
    6971static void gta02_input_init(void);
     72static size_t gta02_get_irq_count(void);
    7073
    7174static void gta02_timer_irq_init(void);
     
    7477static void gta02_timer_irq_handler(irq_t *irq);
    7578
    76 static void *gta02_scons_out;
    77 static s3c24xx_irqc_t *gta02_irqc;
     79static outdev_t *gta02_scons_dev;
     80static s3c24xx_irqc_t gta02_irqc;
    7881static s3c24xx_timer_t *gta02_timer;
    7982
     
    8891        gta02_frame_init,
    8992        gta02_output_init,
    90         gta02_input_init
     93        gta02_input_init,
     94        gta02_get_irq_count
    9195};
    9296
    9397static void gta02_init(void)
    9498{
    95         gta02_scons_out = (void *) hw_map(GTA02_SCONS_BASE, PAGE_SIZE);
    96         gta02_irqc = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE);
     99        s3c24xx_irqc_regs_t *irqc_regs;
     100
    97101        gta02_timer = (void *) hw_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE);
    98 
    99         /* Make all interrupt sources use IRQ mode (not FIQ). */
    100         pio_write_32(&gta02_irqc->intmod, 0x00000000);
    101 
    102         /* Disable all interrupt sources. */
    103         pio_write_32(&gta02_irqc->intmsk, 0xffffffff);
    104 
    105         /* Disable interrupts from all sub-sources. */
    106         pio_write_32(&gta02_irqc->intsubmsk, 0xffffffff);
     102        irqc_regs = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE);
     103
     104        /* Initialize interrupt controller. */
     105        s3c24xx_irqc_init(&gta02_irqc, irqc_regs);
    107106}
    108107
     
    132131        uint32_t inum;
    133132
    134         inum = pio_read_32(&gta02_irqc->intoffset);
     133        /* Determine IRQ number. */
     134        inum = s3c24xx_irqc_inum_get(&gta02_irqc);
     135
     136        /* Clear interrupt condition in the interrupt controller. */
     137        s3c24xx_irqc_clear(&gta02_irqc, inum);
    135138
    136139        irq_t *irq = irq_dispatch_and_lock(inum);
     
    144147                    CPU->id, inum);
    145148        }
    146 
    147         /* Clear interrupt condition in the interrupt controller. */
    148         pio_write_32(&gta02_irqc->srcpnd, S3C24XX_INT_BIT(inum));
    149         pio_write_32(&gta02_irqc->intpnd, S3C24XX_INT_BIT(inum));
    150149}
    151150
     
    176175        }
    177176#endif
    178         outdev_t *scons_dev;
    179 
    180         scons_dev = s3c24xx_uart_init((ioport8_t *) gta02_scons_out);
    181         if (scons_dev)
    182                 stdout_wire(scons_dev);
     177
     178        /* Initialize serial port of the debugging console. */
     179        s3c24xx_uart_io_t *scons_io;
     180
     181        scons_io = (void *) hw_map(GTA02_SCONS_BASE, PAGE_SIZE);
     182        gta02_scons_dev = s3c24xx_uart_init(scons_io, S3C24XX_INT_UART2);
     183
     184        if (gta02_scons_dev) {
     185                /* Create output device. */
     186                stdout_wire(gta02_scons_dev);
     187        }
     188
     189        /*
     190         * This is the necessary evil until the userspace driver is entirely
     191         * self-sufficient.
     192         */
     193        sysinfo_set_item_val("s3c24xx_uart", NULL, true);
     194        sysinfo_set_item_val("s3c24xx_uart.inr", NULL, S3C24XX_INT_UART2);
     195        sysinfo_set_item_val("s3c24xx_uart.address.physical", NULL,
     196            (uintptr_t) GTA02_SCONS_BASE);
     197
    183198}
    184199
    185200static void gta02_input_init(void)
    186201{
     202        s3c24xx_uart_t *scons_inst;
     203
     204        if (gta02_scons_dev) {
     205                /* Create input device. */
     206                scons_inst = (void *) gta02_scons_dev->data;
     207
     208                srln_instance_t *srln_instance = srln_init();
     209                if (srln_instance) {
     210                        indev_t *sink = stdin_wire();
     211                        indev_t *srln = srln_wire(srln_instance, sink);
     212                        s3c24xx_uart_input_wire(scons_inst, srln);
     213
     214                        /* Enable interrupts from UART2 */
     215                        s3c24xx_irqc_src_enable(&gta02_irqc,
     216                            S3C24XX_INT_UART2);
     217
     218                        /* Enable interrupts from UART2 RXD */
     219                        s3c24xx_irqc_subsrc_enable(&gta02_irqc,
     220                            S3C24XX_SUBINT_RXD2);
     221                }
     222        }
     223}
     224
     225size_t gta02_get_irq_count(void)
     226{
     227        return GTA02_IRQ_COUNT;
    187228}
    188229
     
    248289
    249290        /* Enable interrupts from timer0 */
    250         pio_write_32(&gta02_irqc->intmsk, pio_read_32(&gta02_irqc->intmsk) &
    251             ~S3C24XX_INT_BIT(S3C24XX_INT_TIMER0));
     291        s3c24xx_irqc_src_enable(&gta02_irqc, S3C24XX_INT_TIMER0);
    252292
    253293        /* Load data from tcntb0/tcmpb0 into tcnt0/tcmp0. */
  • kernel/arch/arm32/src/mach/integratorcp/integratorcp.c

    r5a9f4d7 r571addd  
    6464        icp_frame_init,
    6565        icp_output_init,
    66         icp_input_init
     66        icp_input_init,
     67        icp_get_irq_count
    6768};
    6869
     
    336337}
    337338
     339size_t icp_get_irq_count(void)
     340{
     341        return ICP_IRQ_COUNT;
     342}
    338343
    339344/** @}
  • kernel/arch/arm32/src/mach/testarm/testarm.c

    r5a9f4d7 r571addd  
    6464        gxemul_frame_init,
    6565        gxemul_output_init,
    66         gxemul_input_init
     66        gxemul_input_init,
     67        gxemul_get_irq_count
    6768};
    6869
     
    126127}
    127128
     129size_t gxemul_get_irq_count(void)
     130{
     131        return GXEMUL_IRQ_COUNT;
     132}
     133
    128134/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
    129135 *
  • kernel/arch/arm32/src/machine_func.c

    r5a9f4d7 r571addd  
    128128size_t machine_get_irq_count(void)
    129129{
    130         size_t irq_count;
    131  
    132 #if defined(MACHINE_gta02)
    133         irq_count = GTA02_IRQ_COUNT;
    134 #elif defined(MACHINE_testarm)
    135         irq_count = GXEMUL_IRQ_COUNT;
    136 #elif defined(MACHINE_integratorcp)
    137         irq_count = ICP_IRQ_COUNT;
    138 #else
    139 #error Machine type not defined.
    140 #endif
    141         return irq_count;
     130        return (machine_ops->machine_get_irq_count)();
    142131}
    143132
  • kernel/genarch/Makefile.inc

    r5a9f4d7 r571addd  
    9090endif
    9191
     92ifeq ($(CONFIG_S3C24XX_IRQC),y)
     93        GENARCH_SOURCES += \
     94                genarch/src/drivers/s3c24xx_irqc/s3c24xx_irqc.c
     95endif
     96
    9297ifeq ($(CONFIG_S3C24XX_UART),y)
    9398        GENARCH_SOURCES += \
  • kernel/genarch/include/drivers/s3c24xx_irqc/s3c24xx_irqc.h

    r5a9f4d7 r571addd  
    5353        ioport32_t subsrcpnd;   /**< Sub source pending */
    5454        ioport32_t intsubmsk;   /** Interrupt sub mask */
    55 } s3c24xx_irqc_t;
     55} s3c24xx_irqc_regs_t;
    5656
    5757/** S3C24xx Interrupt source numbers.
     
    120120#define S3C24XX_SUBINT_BIT(subsource) (1 << (subsource))
    121121
     122typedef struct {
     123        s3c24xx_irqc_regs_t *regs;
     124} s3c24xx_irqc_t;
     125
     126extern void s3c24xx_irqc_init(s3c24xx_irqc_t *, s3c24xx_irqc_regs_t *);
     127extern unsigned s3c24xx_irqc_inum_get(s3c24xx_irqc_t *);
     128extern void s3c24xx_irqc_clear(s3c24xx_irqc_t *, unsigned);
     129extern void s3c24xx_irqc_src_enable(s3c24xx_irqc_t *, unsigned);
     130extern void s3c24xx_irqc_src_disable(s3c24xx_irqc_t *, unsigned);
     131extern void s3c24xx_irqc_subsrc_enable(s3c24xx_irqc_t *, unsigned);
     132extern void s3c24xx_irqc_subsrc_disable(s3c24xx_irqc_t *, unsigned);
     133
    122134#endif
    123135
  • kernel/genarch/include/drivers/s3c24xx_uart/s3c24xx_uart.h

    r5a9f4d7 r571addd  
    3838#define KERN_S3C24XX_UART_H_
    3939
     40#include <ddi/irq.h>
     41#include <console/chardev.h>
    4042#include <typedefs.h>
    41 #include <console/chardev.h>
    4243
    43 extern outdev_t *s3c24xx_uart_init(ioport8_t *);
     44/** S3C24xx UART I/O */
     45typedef struct {
     46        uint32_t ulcon;
     47        uint32_t ucon;
     48        uint32_t ufcon;
     49        uint32_t umcon;
     50
     51        uint32_t utrstat;
     52        uint32_t uerstat;
     53        uint32_t ufstat;
     54        uint32_t umstat;
     55
     56        uint32_t utxh;
     57        uint32_t urxh;
     58
     59        uint32_t ubrdiv;
     60} s3c24xx_uart_io_t;
     61
     62/** S3C24xx UART instance */
     63typedef struct {
     64        s3c24xx_uart_io_t *io;
     65        indev_t *indev;
     66        irq_t irq;
     67} s3c24xx_uart_t;
     68
     69extern outdev_t *s3c24xx_uart_init(s3c24xx_uart_io_t *, inr_t inr);
     70extern void s3c24xx_uart_input_wire(s3c24xx_uart_t *,
     71    indev_t *);
    4472
    4573#endif
  • kernel/genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c

    r5a9f4d7 r571addd  
    4040#include <genarch/drivers/s3c24xx_uart/s3c24xx_uart.h>
    4141#include <console/chardev.h>
     42#include <console/console.h>
     43#include <ddi/device.h>
    4244#include <arch/asm.h>
    4345#include <mm/slab.h>
    44 #include <console/console.h>
    4546#include <sysinfo/sysinfo.h>
    4647#include <str.h>
    4748
    48 /** S3C24xx UART register offsets */
    49 #define S3C24XX_UTRSTAT         0x10
    50 #define S3C24XX_UTXH            0x20
     49/* Bits in UTRSTAT register */
     50#define S3C24XX_UTRSTAT_TX_EMPTY        0x4
     51#define S3C24XX_UTRSTAT_RDATA           0x1
    5152
    52 /* Bits in UTXH register */
    53 #define S3C24XX_UTXH_TX_EMPTY   0x4
    54 
    55 typedef struct {
    56         ioport8_t *base;
    57 } s3c24xx_uart_instance_t;
     53#define S3C24XX_UFSTAT_TX_FULL          0x4000
     54#define S3C24XX_UFSTAT_RX_FULL          0x0040
     55#define S3C24XX_UFSTAT_RX_COUNT         0x002f
    5856
    5957static void s3c24xx_uart_sendb(outdev_t *dev, uint8_t byte)
    6058{
    61         s3c24xx_uart_instance_t *instance =
    62             (s3c24xx_uart_instance_t *) dev->data;
    63         ioport32_t *utrstat, *utxh;
     59        s3c24xx_uart_t *uart =
     60            (s3c24xx_uart_t *) dev->data;
    6461
    65         utrstat = (ioport32_t *) (instance->base + S3C24XX_UTRSTAT);
    66         utxh = (ioport32_t *) (instance->base + S3C24XX_UTXH);
    67 
    68         /* Wait for transmitter to be empty. */
    69         while ((pio_read_32(utrstat) & S3C24XX_UTXH_TX_EMPTY) == 0)
     62        /* Wait for space becoming available in Tx FIFO. */
     63        while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_TX_FULL) != 0)
    7064                ;
    7165
    72         pio_write_32(utxh, byte);
     66        pio_write_32(&uart->io->utxh, byte);
    7367}
    7468
     
    8680}
    8781
     82static irq_ownership_t s3c24xx_uart_claim(irq_t *irq)
     83{
     84        return IRQ_ACCEPT;
     85}
     86
     87static void s3c24xx_uart_irq_handler(irq_t *irq)
     88{
     89        s3c24xx_uart_t *uart = irq->instance;
     90
     91        while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_RX_COUNT) != 0) {
     92                uint32_t data = pio_read_32(&uart->io->urxh);
     93                pio_read_32(&uart->io->uerstat);
     94                indev_push_character(uart->indev, data & 0xff);
     95        }
     96}
     97
    8898static outdev_operations_t s3c24xx_uart_ops = {
    8999        .write = s3c24xx_uart_putchar,
     
    91101};
    92102
    93 outdev_t *s3c24xx_uart_init(ioport8_t *base)
     103outdev_t *s3c24xx_uart_init(s3c24xx_uart_io_t *io, inr_t inr)
    94104{
    95105        outdev_t *uart_dev = malloc(sizeof(outdev_t), FRAME_ATOMIC);
     
    97107                return NULL;
    98108
    99         s3c24xx_uart_instance_t *instance =
    100             malloc(sizeof(s3c24xx_uart_instance_t), FRAME_ATOMIC);
    101         if (!instance) {
     109        s3c24xx_uart_t *uart =
     110            malloc(sizeof(s3c24xx_uart_t), FRAME_ATOMIC);
     111        if (!uart) {
    102112                free(uart_dev);
    103113                return NULL;
     
    105115
    106116        outdev_initialize("s3c24xx_uart_dev", uart_dev, &s3c24xx_uart_ops);
    107         uart_dev->data = instance;
     117        uart_dev->data = uart;
    108118
    109         instance->base = base;
     119        uart->io = io;
     120        uart->indev = NULL;
     121
     122        /* Initialize IRQ structure. */
     123        irq_initialize(&uart->irq);
     124        uart->irq.devno = device_assign_devno();
     125        uart->irq.inr = inr;
     126        uart->irq.claim = s3c24xx_uart_claim;
     127        uart->irq.handler = s3c24xx_uart_irq_handler;
     128        uart->irq.instance = uart;
     129
     130        /* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */
     131        pio_write_32(&uart->io->ufcon, 0x01);
     132
     133        /* Set RX interrupt to pulse mode */
     134        pio_write_32(&uart->io->ucon,
     135            pio_read_32(&uart->io->ucon) & ~(1 << 8));
    110136
    111137        if (!fb_exported) {
     
    116142                sysinfo_set_item_val("fb", NULL, true);
    117143                sysinfo_set_item_val("fb.kind", NULL, 3);
    118                 sysinfo_set_item_val("fb.address.physical", NULL, KA2PA(base));
     144                sysinfo_set_item_val("fb.address.physical", NULL, KA2PA(io));
    119145
    120146                fb_exported = true;
     
    124150}
    125151
     152void s3c24xx_uart_input_wire(s3c24xx_uart_t *uart, indev_t *indev)
     153{
     154        ASSERT(uart);
     155        ASSERT(indev);
     156
     157        uart->indev = indev;
     158        irq_register(&uart->irq);
     159}
     160
    126161/** @}
    127162 */
  • uspace/Makefile

    r5a9f4d7 r571addd  
    6969        srv/hid/kbd \
    7070        srv/hw/char/i8042 \
     71        srv/hw/char/s3c24xx_uart \
    7172        srv/hw/netif/dp8390 \
    7273        srv/net/cfg \
  • uspace/app/init/init.c

    r5a9f4d7 r571addd  
    274274        srv_start("/srv/cuda_adb");
    275275        srv_start("/srv/i8042");
     276        srv_start("/srv/s3c24ser");
    276277        srv_start("/srv/adb_ms");
    277278        srv_start("/srv/char_ms");
  • uspace/srv/hid/kbd/Makefile

    r5a9f4d7 r571addd  
    6060        ifeq ($(MACHINE),gta02)
    6161                SOURCES += \
    62                         port/dummy.c \
    63                         ctl/pc.c
     62                        port/chardev.c \
     63                        ctl/stty.c
    6464        endif
    6565        ifeq ($(MACHINE),testarm)
  • uspace/srv/hid/kbd/port/chardev.c

    r5a9f4d7 r571addd  
    4141#include <kbd.h>
    4242#include <vfs/vfs.h>
     43#include <sys/stat.h>
    4344#include <fcntl.h>
    4445#include <errno.h>
     
    5051#define NAME "kbd"
    5152
     53/** List of devices to try connecting to. */
     54static const char *in_devs[] = {
     55        "/dev/char/ps2a",
     56        "/dev/char/s3c24ser"
     57};
     58
     59static const int num_devs = sizeof(in_devs) / sizeof(in_devs[0]);
     60
    5261int kbd_port_init(void)
    5362{
    54         const char *input = "/dev/char/ps2a";
    5563        int input_fd;
     64        int i;
    5665
    57         printf(NAME ": open %s\n", input);
     66        input_fd = -1;
     67        for (i = 0; i < num_devs; i++) {
     68                struct stat s;
    5869
    59         input_fd = open(input, O_RDONLY);
     70                if (stat(in_devs[i], &s) == EOK)
     71                        break;
     72        }
     73
     74        if (i >= num_devs) {
     75                printf(NAME ": Could not find any suitable input device.\n");
     76                return -1;
     77        }
     78
     79        input_fd = open(in_devs[i], O_RDONLY);
    6080        if (input_fd < 0) {
    61                 printf(NAME ": Failed opening %s (%d)\n", input, input_fd);
    62                 return false;
     81                printf(NAME ": failed opening device %s (%d).\n", in_devs[i],
     82                    input_fd);
     83                return -1;
    6384        }
    6485
    6586        dev_phone = fd_phone(input_fd);
    6687        if (dev_phone < 0) {
    67                 printf(NAME ": Failed to connect to device\n");
    68                 return false;
     88                printf(NAME ": Failed connecting to device\n");
     89                return -1;
    6990        }
    7091
     
    7394        if (ipc_connect_to_me(dev_phone, 0, 0, 0, &phonehash) != 0) {
    7495                printf(NAME ": Failed to create callback from device\n");
    75                 return false;
     96                return -1;
    7697        }
    7798
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