Changeset 54a7a20 in mainline


Ignore:
Timestamp:
2011-06-27T15:26:45Z (13 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
faf9752
Parents:
7250d2c
Message:

cstyle (no change in functionality)

Location:
kernel/arch/mips32/src/mm
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/mips32/src/mm/as.c

    r7250d2c r54a7a20  
    6161        /*
    6262         * Install ASID.
    63          */     
     63         */
    6464        hi.value = cp0_entry_hi_read();
    6565
    6666        hi.asid = as->asid;
    67         cp0_entry_hi_write(hi.value);   
     67        cp0_entry_hi_write(hi.value);
    6868}
    6969
  • kernel/arch/mips32/src/mm/tlb.c

    r7250d2c r54a7a20  
    7373                tlbwi();
    7474        }
    75                
     75       
    7676        /*
    7777         * The kernel is going to make use of some wired
     
    386386                        ASSERT(pte->w || access != PF_ACCESS_WRITE);
    387387                        return pte;
    388                         break;
    389388                case AS_PF_DEFER:
    390389                        *pfrc = AS_PF_DEFER;
    391390                        return NULL;
    392                         break;
    393391                case AS_PF_FAULT:
    394392                        *pfrc = AS_PF_FAULT;
    395393                        return NULL;
    396                         break;
    397394                default:
    398395                        panic("Unexpected rc (%d).", rc);
Note: See TracChangeset for help on using the changeset viewer.