Changeset 54171e8 in mainline


Ignore:
Timestamp:
2010-07-01T22:00:23Z (14 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
d5042d28
Parents:
6dce6af
Message:

switch to C-style comments
improve indentation

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/ia64/src/asm.S

    r6dce6af r54171e8  
    1 #
    2 # Copyright (c) 2005 Jakub Jermar
    3 # All rights reserved.
    4 #
    5 # Redistribution and use in source and binary forms, with or without
    6 # modification, are permitted provided that the following conditions
    7 # are met:
    8 #
    9 # - Redistributions of source code must retain the above copyright
    10 #   notice, this list of conditions and the following disclaimer.
    11 # - Redistributions in binary form must reproduce the above copyright
    12 #   notice, this list of conditions and the following disclaimer in the
    13 #   documentation and/or other materials provided with the distribution.
    14 # - The name of the author may not be used to endorse or promote products
    15 #   derived from this software without specific prior written permission.
    16 #
    17 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
    18 # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
    19 # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
    20 # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
    21 # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    22 # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    23 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    24 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    25 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    26 # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    27 #
     1/*
     2 * Copyright (c) 2005 Jakub Jermar
     3 * All rights reserved.
     4 *
     5 * Redistribution and use in source and binary forms, with or without
     6 * modification, are permitted provided that the following conditions
     7 * are met:
     8 *
     9 * - Redistributions of source code must retain the above copyright
     10 *   notice, this list of conditions and the following disclaimer.
     11 * - Redistributions in binary form must reproduce the above copyright
     12 *   notice, this list of conditions and the following disclaimer in the
     13 *   documentation and/or other materials provided with the distribution.
     14 * - The name of the author may not be used to endorse or promote products
     15 *   derived from this software without specific prior written permission.
     16 *
     17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27 */
    2828
    2929#include <arch/register.h>
    3030
    3131.text
    32 
    33 /** Copy memory from/to userspace.
    34  *
    35  * This memcpy() has been taken from the assembler output of
    36  * the generic _memcpy() and modified to have the failover part.
    37  *
    38  * @param in0 Destination address.
    39  * @param in1 Source address.
    40  * @param in2 Number of byte to copy.
    41  */
    4232.global memcpy
    4333.global memcpy_from_uspace
    … …  
    4535.global memcpy_from_uspace_failover_address
    4636.global memcpy_to_uspace_failover_address
     37
     38/** Copy memory from/to userspace.
     39 *
     40 * This memcpy() has been taken from the assembler output of
     41 * the generic _memcpy() and modified to have the failover part.
     42 *
     43 * @param in0 Destination address.
     44 * @param in1 Source address.
     45 * @param in2 Number of byte to copy.
     46 *
     47 */
    4748memcpy:
    4849memcpy_from_uspace:
    4950memcpy_to_uspace:
    5051        alloc loc0 = ar.pfs, 3, 1, 0, 0
    51 
     52       
    5253        adds r14 = 7, in1
    5354        mov r2 = ar.lc
    … …  
    5556        and r14 = -8, r14 ;;
    5657        cmp.ne p6, p7 = r14, in1
    57 (p7)    br.cond.dpnt 3f ;;
    58 0:
    59         cmp.ne p6, p7 = 0, in2
    60 (p7)    br.cond.dpnt 2f ;;
    61 (p6)    adds r14 = -1, in2
    62 (p6)    mov r16 = r0
    63 (p6)    mov r17 = r0 ;;
    64 (p6)    mov ar.lc = r14
    65 1:
    66         add r14 = r16, in1
    67         add r15 = r16, in0
    68         adds r17 = 1, r17 ;;
    69         ld1 r14 = [r14]
    70         mov r16 = r17 ;;
    71         st1 [r15] = r14
    72         br.cloop.sptk.few 1b ;;
    73 2:
    74         mov ar.lc = r2
    75         mov ar.pfs = loc0
    76         br.ret.sptk.many rp
    77 3:
    78         adds r14 = 7, in0 ;;
    79         and r14 = -8, r14 ;;
    80         cmp.eq p6, p7 = r14, in0
    81 (p7)    br.cond.dptk 0b
    82         shr.u r18 = in2, 3 ;;
    83         cmp.ne p6, p7 = 0, r18
    84 (p7)    br.cond.dpnt 5f ;;
    85 (p6)    adds r14 = -1, r18
    86 (p6)    mov r16 = r0
    87 (p6)    mov r17 = r0 ;;
    88 (p6)    mov ar.lc = r14
    89 4:
    90         shladd r14 = r16, 3, r0
    91         adds r16 = 1, r17 ;;
    92         add r15 = in1, r14
    93         add r14 = in0, r14
    94         mov r17 = r16 ;;
    95         ld8 r15 = [r15] ;;
    96         st8 [r14] = r15
    97         br.cloop.sptk.few 4b
    98 5:
    99         and r15 = 7, in2
    100         shladd r14 = r18, 3, r0
    101         mov r16 = r0
    102         mov r18 = r0 ;;
    103         cmp.eq p6, p7 = 0, r15
    104         add in0 = r14, in0
    105         adds r15 = -1, r15
    106         add r17 = r14, in1
    107 (p6)    br.cond.dpnt 2b ;;
    108         mov ar.lc = r15
    109 6:
    110         add r14 = r16, r17
    111         add r15 = r16, in0
    112         adds r16 = 1, r18 ;;
    113         ld1 r14 = [r14]
    114         mov r18 = r16 ;;
    115         st1 [r15] = r14
    116         br.cloop.sptk.few 6b ;;
    117         mov ar.lc = r2
    118         mov ar.pfs = loc0
    119         br.ret.sptk.many rp
    120        
     58        (p7) br.cond.dpnt 3f ;;
     59       
     60        0:
     61       
     62                cmp.ne p6, p7 = 0, in2
     63                (p7) br.cond.dpnt 2f ;;
     64                (p6) adds r14 = -1, in2
     65                (p6) mov r16 = r0
     66                (p6) mov r17 = r0 ;;
     67                (p6) mov ar.lc = r14
     68       
     69        1:
     70       
     71                add r14 = r16, in1
     72                add r15 = r16, in0
     73                adds r17 = 1, r17 ;;
     74                ld1 r14 = [r14]
     75                mov r16 = r17 ;;
     76                st1 [r15] = r14
     77                br.cloop.sptk.few 1b ;;
     78       
     79        2:
     80       
     81                mov ar.lc = r2
     82                mov ar.pfs = loc0
     83                br.ret.sptk.many rp
     84       
     85        3:
     86       
     87                adds r14 = 7, in0 ;;
     88                and r14 = -8, r14 ;;
     89                cmp.eq p6, p7 = r14, in0
     90                (p7) br.cond.dptk 0b
     91                shr.u r18 = in2, 3 ;;
     92                cmp.ne p6, p7 = 0, r18
     93                (p7) br.cond.dpnt 5f ;;
     94                (p6) adds r14 = -1, r18
     95                (p6) mov r16 = r0
     96                (p6) mov r17 = r0 ;;
     97                (p6) mov ar.lc = r14
     98       
     99        4:
     100       
     101                shladd r14 = r16, 3, r0
     102                adds r16 = 1, r17 ;;
     103                add r15 = in1, r14
     104                add r14 = in0, r14
     105                mov r17 = r16 ;;
     106                ld8 r15 = [r15] ;;
     107                st8 [r14] = r15
     108                br.cloop.sptk.few 4b
     109       
     110        5:
     111       
     112                and r15 = 7, in2
     113                shladd r14 = r18, 3, r0
     114                mov r16 = r0
     115                mov r18 = r0 ;;
     116                cmp.eq p6, p7 = 0, r15
     117                add in0 = r14, in0
     118                adds r15 = -1, r15
     119                add r17 = r14, in1
     120                (p6) br.cond.dpnt 2b ;;
     121                mov ar.lc = r15
     122       
     123        6:
     124       
     125                add r14 = r16, r17
     126                add r15 = r16, in0
     127                adds r16 = 1, r18 ;;
     128                ld1 r14 = [r14]
     129                mov r18 = r16 ;;
     130                st1 [r15] = r14
     131                br.cloop.sptk.few 6b ;;
     132                mov ar.lc = r2
     133                mov ar.pfs = loc0
     134                br.ret.sptk.many rp
     135
    121136memcpy_from_uspace_failover_address:
    122137memcpy_to_uspace_failover_address:
    123         mov r8 = r0                     /* return 0 on failure */
     138        /* Return 0 on failure */
     139        mov r8 = r0
    124140        mov ar.pfs = loc0
    125141        br.ret.sptk.many rp
    … …  
    145161 * @param in4 Value to be stored in IPSR.
    146162 * @param in5 Value to be stored in RSC.
     163 *
    147164 */
    148165.global switch_to_userspace
    149166switch_to_userspace:
    150167        alloc loc0 = ar.pfs, 6, 3, 0, 0
    151         rsm (PSR_IC_MASK | PSR_I_MASK)          /* disable interruption collection and interrupts */
     168       
     169        /* Disable interruption collection and interrupts */
     170        rsm (PSR_IC_MASK | PSR_I_MASK)
    152171        srlz.d ;;
    153172        srlz.i ;;
    … …  
    156175        mov cr.iip = in0
    157176        mov r12 = in1
    158 
     177       
    159178        xor r1 = r1, r1
    160179       
    … …  
    165184        movl loc2 = PFM_MASK ;;
    166185        and loc1 = loc2, loc1 ;;
    167         mov cr.ifs = loc1 ;;                    /* prevent decrementing BSP by rfi */
    168 
     186        mov cr.ifs = loc1 ;;  /* prevent decrementing BSP by rfi */
     187       
    169188        invala
    170189       
    171190        mov loc1 = ar.rsc ;;
    172         and loc1 = ~3, loc1 ;;                 
    173         mov ar.rsc = loc1 ;;                    /* put RSE into enforced lazy mode */
    174 
     191        and loc1 = ~3, loc1 ;;
     192        mov ar.rsc = loc1 ;;  /* put RSE into enforced lazy mode */
     193       
    175194        flushrs ;;
    176195       
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