Changeset 3ee38a9 in mainline

Timestamp:

2013-06-07T19:22:02Z (11 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

e006ba5

Parents:

74dcc07

Message:

arm32: More cp15 macro usage

Location:

kernel/arch/arm32/include/arch

Files:

• asm.h (modified) (3 diffs)
• mm/page_armv4.h (modified) (2 diffs)
• mm/page_armv6.h (modified) (2 diffs)

kernel/arch/arm32/include/arch/asm.h

@@ -38 +38 @@
 
 #include <typedefs.h>
+#include <arch/cp15.h>
 #include <arch/stack.h>
 #include <config.h>
@@ -51 +52 @@
  * chapter 2.3.8 p.2-22 (52 in the PDF)
  *
- * @note Although mcr p15, 0, R0, c7, c0, 4 is defined in ARM Architecture
- * reference manual for armv4/5 CP15 implementation is mandatory only for
- * armv6+.
+ * @note Although CP15WFI (mcr p15, 0, R0, c7, c0, 4) is defined in ARM
+ * Architecture reference manual for armv4/5, CP15 implementation is mandatory
+ * only for armv6+.
  */
 NO_TRACE static inline void cpu_sleep(void)
@@ -60 +61 @@
         asm volatile ( "wfe" );
 #elif defined(PROCESSOR_ARCH_armv6) | defined(PROCESSOR_arm926ej_s) | defined(PROCESSOR_arm920t)
-        asm volatile ( "mcr p15, 0, R0, c7, c0, 4" );
+        WFI_write(0);
 #endif
 }

kernel/arch/arm32/include/arch/mm/page_armv4.h

@@ -41 +41 @@
 #error "Do not include arch specific page.h directly use generic page.h instead"
 #endif
+
+#include <arch/cp15.h>
 
 /* Macros for querying the last-level PTE entries. */
@@ -128 +130 @@
 NO_TRACE static inline void set_ptl0_addr(pte_t *pt)
 {
-        asm volatile (
-                "mcr p15, 0, %[pt], c2, c0, 0\n"
-                :: [pt] "r" (pt)
-        );
+        TTBR0_write((uint32_t)pt);
 }
 

kernel/arch/arm32/include/arch/mm/page_armv6.h

@@ -40 +40 @@
 #error "Do not include arch specific page.h directly use generic page.h instead"
 #endif
+
+#include <arch/cp15.h>
 
 /* Macros for querying the last-level PTE entries. */
@@ -132 +134 @@
 NO_TRACE static inline void set_ptl0_addr(pte_t *pt)
 {
-        asm volatile (
-                "mcr p15, 0, %[pt], c2, c0, 0\n"
-                :: [pt] "r" (pt)
-        );
+        TTBR0_write((uint32_t)pt);
 }