Changes in / [5c5f522:3ce5162] in mainline
- Location:
- uspace/drv/nic/rtl8139
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/rtl8139/defs.h
r5c5f522 r3ce5162 29 29 /** @file rtl8139_defs.h 30 30 * 31 * Registers, bit positions and masks definition 32 * of the RTL8139 network family cards 33 */ 34 35 #ifndef RTL8139_DEFS_H_ 36 #define RTL8139_DEFS_H_ 37 31 * Registers, bit positions and masks definition of the RTL8139 network family 32 * cards 33 */ 34 35 #ifndef RTL8139_DEFS_H_INCLUDED_ 36 #define RTL8139_DEFS_H_INCLUDED_ 38 37 #include <sys/types.h> 39 38 #include <libarch/ddi.h> 40 39 41 /** Size of RTL8139 registers address space */ 42 #define RTL8139_IO_SIZE 256 43 44 /** Maximal transmitted frame length 45 * 46 * Maximal transmitted frame length in bytes 47 * allowed according to the RTL8139 documentation 48 * (see SIZE part of TSD documentation). 49 * 50 */ 51 #define RTL8139_FRAME_MAX_LENGTH 1792 40 41 /** The size of RTL8139 registers address space */ 42 #define RTL8139_IO_SIZE 256 43 44 /** The maximal transmitted frame length in bytes allowed according to RTL8139 45 * documentation (see SIZE part of TSD documentation) 46 */ 47 #define RTL8139_FRAME_MAX_LENGTH 1792 48 52 49 53 50 /** HW version 54 51 * 55 * As can be detected from HWVERID part of TCR 56 * (Transmit Configuration Register). 57 * 58 */ 59 typedef enum { 52 * as can be detected from HWVERID part of TCR 53 * (Transmit Configuration Register) 54 */ 55 enum rtl8139_version_id { 60 56 RTL8139 = 0, /**< RTL8139 */ 61 57 RTL8139A, /**< RTL8139A */ … … 70 66 RTL8101, /**< RTL8101 */ 71 67 RTL8139_VER_COUNT /**< Count of known RTL versions, the last value */ 72 } rtl8139_version_id_t; 68 }; 69 70 extern const char* model_names[RTL8139_VER_COUNT]; 73 71 74 72 /** Registers of RTL8139 family card offsets from the memory address base */ … … 77 75 MAC0 = IDR0, /**< Alias for IDR0 */ 78 76 79 // 0x 06 - 0x07 reserved77 // 0x6 - 0x7 reserved 80 78 81 79 MAR0 = 0x08, /**< Multicast mask registers 8 1b registers sequence */ … … 215 213 pio_write_8(io_base + CR9346, RTL8139_REGS_LOCKED); 216 214 } 217 218 215 /** Allow to change Config0-4 and BMCR register */ 219 216 static inline void rtl8139_regs_unlock(void *io_base) … … 420 417 421 418 /** Maximal runt frame size + 1 */ 422 #define RTL8139_RUNT_MAX_SIZE 419 #define RTL8139_RUNT_MAX_SIZE 64 423 420 424 421 /** Bits in frame header */ … … 473 470 474 471 /** Mapping of HW version -> version ID */ 475 struct rtl8139_hwver_map { 476 uint32_t hwverid; /**< HW version value in the register */477 rtl8139_version_id_tver_id; /**< appropriate version id */472 struct rtl8139_hwver_map { 473 uint32_t hwverid; /**< HW version value in the register */ 474 enum rtl8139_version_id ver_id; /**< appropriate version id */ 478 475 }; 479 476 480 477 /** Mapping of HW version -> version ID */ 481 478 extern const struct rtl8139_hwver_map rtl8139_versions[RTL8139_VER_COUNT + 1]; 482 extern const char* model_names[RTL8139_VER_COUNT];483 479 484 480 /** Size in the frame header while copying from RxFIFO to Rx buffer */ 485 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0) 486 481 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0) 487 482 /** The only supported pause frame time value */ 488 #define RTL8139_PAUSE_VAL 483 #define RTL8139_PAUSE_VAL UINT16_C(0xFFFF) 489 484 490 485 /** Size of the frame header in front of the received frame */ 491 #define RTL_FRAME_HEADER_SIZE 486 #define RTL_FRAME_HEADER_SIZE 4 492 487 493 488 /** 8k buffer */ -
uspace/drv/nic/rtl8139/driver.c
r5c5f522 r3ce5162 55 55 /** Global mutex for work with shared irq structure */ 56 56 FIBRIL_MUTEX_INITIALIZE(irq_reg_lock); 57 58 57 /** Lock interrupt structure mutex */ 59 #define RTL8139_IRQ_STRUCT_LOCK() \ 60 fibril_mutex_lock(&irq_reg_lock) 61 58 #define RTL8139_IRQ_STRUCT_LOCK() fibril_mutex_lock(&irq_reg_lock) 62 59 /** Unlock interrupt structure mutex */ 63 #define RTL8139_IRQ_STRUCT_UNLOCK() \ 64 fibril_mutex_unlock(&irq_reg_lock) 60 #define RTL8139_IRQ_STRUCT_UNLOCK() fibril_mutex_unlock(&irq_reg_lock) 65 61 66 62 /** PCI clock frequency in kHz */ 67 #define RTL8139_PCI_FREQ_KHZ 68 69 #define RTL8139_AUTONEG_CAPS (ETH_AUTONEG_10BASE_T_HALF |\70 ETH_AUTONEG_10BASE_T_FULL | ETH_AUTONEG_100BASE_TX_HALF |\71 63 #define RTL8139_PCI_FREQ_KHZ 33000 64 65 #define RTL8139_AUTONEG_CAPS (ETH_AUTONEG_10BASE_T_HALF \ 66 | ETH_AUTONEG_10BASE_T_FULL | ETH_AUTONEG_100BASE_TX_HALF \ 67 | ETH_AUTONEG_100BASE_TX_FULL | ETH_AUTONEG_PAUSE_SYMETRIC) 72 68 73 69 /** Lock transmitter and receiver data 74 * 75 * This function shall be called whenever 76 * both transmitter and receiver locking 77 * to force safe lock ordering (deadlock prevention) 78 * 79 * @param rtl8139 RTL8139 private data 80 * 70 * This function shall be called whenever both transmitter and receiver locking 71 * to force safe lock ordering (deadlock prevention) 72 * 73 * @param rtl8139 RTL8139 private data 81 74 */ 82 75 inline static void rtl8139_lock_all(rtl8139_t *rtl8139) … … 89 82 /** Unlock transmitter and receiver data 90 83 * 91 * @param rtl8139 RTL8139 private data 92 * 84 * @param rtl8139 RTL8139 private data 93 85 */ 94 86 inline static void rtl8139_unlock_all(rtl8139_t *rtl8139) … … 465 457 pio_write_32(tsd, tsd_value); 466 458 return; 467 459 468 460 err_busy_no_inc: 469 461 err_size: … … 521 513 * 522 514 * @return The frame list node (not connected) 523 *524 515 */ 525 516 static nic_frame_t *rtl8139_read_frame(nic_t *nic_data, … … 1224 1215 ddf_msg(LVL_DEBUG, "The device is initialized"); 1225 1216 return ret; 1226 1217 1227 1218 failed: 1228 1219 ddf_msg(LVL_ERROR, "The device initialization failed"); … … 1351 1342 1352 1343 return EOK; 1353 1344 1354 1345 err_fun_bind: 1355 1346 ddf_fun_unbind(fun); -
uspace/drv/nic/rtl8139/driver.h
r5c5f522 r3ce5162 30 30 #define RTL8139_DRIVER_H_ 31 31 32 #include "defs.h" 33 #include "general.h" 32 34 #include <sys/types.h> 33 35 #include <stdint.h> 34 #include "defs.h"35 #include "general.h"36 36 37 37 /** The driver name */ 38 #define NAME "rtl8139" 39 38 #define NAME "rtl8139" 40 39 /** Transmittion buffers count */ 41 #define TX_BUFF_COUNT 42 43 /** Size of buffer for one frame (2kB) */ 44 #define TX_BUFF_SIZE (2 * 1024) 45 46 /** Numberof pages to allocate for TxBuffers */47 #define TX_PAGES 40 #define TX_BUFF_COUNT 4 41 /** Size of buffer for one frame 42 * - 2kB 43 */ 44 #define TX_BUFF_SIZE (2 * 1024) 45 /** Count of pages to allocate for TxBuffers */ 46 #define TX_PAGES 2 48 47 49 48 /** Size of the CRC after the received frame in the receiver buffer */ 50 #define RTL8139_CRC_SIZE 49 #define RTL8139_CRC_SIZE 4 51 50 52 51 /** The default mode of accepting unicast frames */ 53 #define RTL8139_RCR_UCAST_DEFAULT RCR_ACCEPT_PHYS_MATCH 54 52 #define RTL8139_RCR_UCAST_DEFAULT RCR_ACCEPT_PHYS_MATCH 55 53 /** The default mode of accepting multicast frames */ 56 #define RTL8139_RCR_MCAST_DEFAULT 0 57 54 #define RTL8139_RCR_MCAST_DEFAULT 0 58 55 /** The default mode of accepting broadcast frames */ 59 #define RTL8139_RCR_BCAST_DEFAULT RCR_ACCEPT_BROADCAST 60 56 #define RTL8139_RCR_BCAST_DEFAULT RCR_ACCEPT_BROADCAST 61 57 /** The default mode of accepting defect frames */ 62 #define RTL8139_RCR_DEFECT_DEFAULT 58 #define RTL8139_RCR_DEFECT_DEFAULT 0 63 59 64 60 /** Mask for accepting all multicast */ 65 #define RTL8139_MCAST_MASK_PROMISC 66 67 /** Data */61 #define RTL8139_MCAST_MASK_PROMISC UINT64_MAX 62 63 /** Data */ 68 64 struct rtl8139_rcr_data { 69 65 /** Configuration part of RCR */ … … 138 134 139 135 /** Version of RT8139 controller */ 140 rtl8139_version_id_thw_version;136 enum rtl8139_version_id hw_version; 141 137 } rtl8139_t; 138 142 139 143 140 /* ***** Pointers casting - for both amd64 and ia32 ***** */ … … 163 160 */ 164 161 #define IOADDR_TO_PTR(ioaddr) ((void*)((size_t)(ioaddr))) 162 163 165 164 166 165 /* ***** Bit operation macros ***** */ … … 178 177 * @return New value 179 178 */ 180 #define bit_set_part_g( src, value, mask, type) \179 #define bit_set_part_g( src, value, mask, type ) \ 181 180 ((type)(((src) & ~((type)(mask))) | ((value) & (type)(mask)))) 182 181 … … 238 237 bit_set_part_32(tsd_value, (size) << TSD_SIZE_SHIFT, TSD_SIZE_MASK << TSD_SIZE_SHIFT) 239 238 239 240 240 #endif -
uspace/drv/nic/rtl8139/general.h
r5c5f522 r3ce5162 37 37 #include <unistd.h> 38 38 39 /** Number of microseconds in second */ 40 #define RTL8139_USEC_IN_SEC 1000000 39 extern void* rtl8139_memcpy_wrapped(void *dest, const void *src_buf, 40 size_t src_offset, size_t src_size, size_t data_size); 41 41 42 42 43 /** Structure for HW timer control */ 43 typedef struct {44 typedef struct rtl8139_timer_act { 44 45 /** Register value set in the last timer period */ 45 46 uint32_t last_val; 46 47 47 /** Register value set in the common timer period */ 48 48 uint32_t full_val; 49 49 50 50 /** Amount of full register periods in timer period */ 51 51 size_t full_skips; 52 53 52 /** Remaining full register periods to the next period end */ 54 53 size_t full_skips_remains; 55 56 54 /** Mark if there is a last run */ 57 55 int last_run; 58 56 } rtl8139_timer_act_t; 59 57 60 extern void *rtl8139_memcpy_wrapped(void *, const void *, size_t, size_t, 61 size_t); 62 extern int rtl8139_timer_act_init(rtl8139_timer_act_t *, uint32_t, 63 const struct timeval *); 64 extern int rtl8139_timer_act_step(rtl8139_timer_act_t *, uint32_t *); 58 /** Count of microseconds in second */ 59 #define RTL8139_USEC_IN_SEC 1000000 60 61 extern int rtl8139_timer_act_init(rtl8139_timer_act_t *ta, uint32_t timer_freq, 62 const struct timeval *time); 63 extern int rtl8139_timer_act_step(rtl8139_timer_act_t *ta, uint32_t *new_reg); 64 65 65 66 66 #endif
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