Changes in uspace/drv/ohci/ohci_regs.h [112d159:2c617b0] in mainline
- File:
-
- 1 edited
-
uspace/drv/ohci/ohci_regs.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/ohci/ohci_regs.h
r112d159 r2c617b0 41 41 const volatile uint32_t revision; 42 42 volatile uint32_t control; 43 #define C_CSBR_MASK (0x3) /* Control-bulk service ratio */ 44 #define C_CSBR_1_1 (0x0) 45 #define C_CSBR_1_2 (0x1) 46 #define C_CSBR_1_3 (0x2) 47 #define C_CSBR_1_4 (0x3) 43 #define C_CSBR_MASK (0x3) 48 44 #define C_CSBR_SHIFT (0) 45 #define C_PLE (1 << 2) 46 #define C_IE (1 << 3) 47 #define C_CLE (1 << 4) 48 #define C_BLE (1 << 5) 49 49 50 #define C_PLE (1 << 2) /* Periodic list enable */ 51 #define C_IE (1 << 3) /* Isochronous enable */ 52 #define C_CLE (1 << 4) /* Control list enable */ 53 #define C_BLE (1 << 5) /* Bulk list enable */ 50 #define C_HCFS_MASK (0x3) 51 #define C_HCFS_SHIFT (6) 52 #define C_HCFS_RESET (0x0) 53 #define C_HCFS_OPERATIONAL (0x1) 54 #define C_HCFS_RESUME (0x2) 55 #define C_HCFS_SUSPEND (0x3) 54 56 55 #define C_HCFS_MASK (0x3) /* Host controller functional state */ 56 #define C_HCFS_RESET (0x0) 57 #define C_HCFS_OPERATIONAL (0x1) 58 #define C_HCFS_RESUME (0x2) 59 #define C_HCFS_SUSPEND (0x3) 60 #define C_HCFS_SHIFT (6) 61 62 #define C_IR (1 << 8) /* Interrupt routing, make sure it's 0 */ 63 #define C_RWC (1 << 9) /* Remote wakeup connected, host specific */ 64 #define C_RWE (1 << 10) /* Remote wakeup enable */ 57 #define C_IR (1 << 8) 58 #define C_RWC (1 << 9) 59 #define C_RWE (1 << 10) 65 60 66 61 volatile uint32_t command_status; 67 #define CS_HCR (1 << 0) /* Host controller reset */68 #define CS_CLF (1 << 1) /* Control list filled */69 #define CS_BLF (1 << 2) /* Bulk list filled */70 #define CS_OCR (1 << 3) /* Ownership change request */71 #define CS_SOC_MASK (0x3) /* Scheduling overrun count */62 #define CS_HCR (1 << 0) 63 #define CS_CLF (1 << 1) 64 #define CS_BLF (1 << 2) 65 #define CS_OCR (1 << 3) 66 #define CS_SOC_MASK (0x3) 72 67 #define CS_SOC_SHIFT (16) 73 68 74 69 volatile uint32_t interrupt_status; 75 #define IS_SO (1 << 0) /* Scheduling overrun */76 #define IS_WDH (1 << 1) /* Write-back done head */77 #define IS_SF (1 << 2) /* Start of frame */78 #define IS_RD (1 << 3) /* Resume detected */79 #define IS_UE (1 << 4) /* Unrecoverable error */80 #define IS_FNO (1 << 5) /* Frame number overflow */81 #define IS_RHSC (1 << 6) /* Root hub status change */82 #define IS_OC (1 << 30) /* Ownership change */70 #define IS_SO (1 << 0) 71 #define IS_WDH (1 << 1) 72 #define IS_SF (1 << 2) 73 #define IS_RD (1 << 3) 74 #define IS_UE (1 << 4) 75 #define IS_FNO (1 << 5) 76 #define IS_RHSC (1 << 6) 77 #define IS_OC (1 << 30) 83 78 84 /** Interupt enable/disable, reads give the same value, writing causes 85 * enable/disable */ 86 volatile uint32_t interrupt_enable; 79 volatile uint32_t interupt_enable; 80 #define IE_SO (1 << 0) 81 #define IE_WDH (1 << 1) 82 #define IE_SF (1 << 2) 83 #define IE_RD (1 << 3) 84 #define IE_UE (1 << 4) 85 #define IE_FNO (1 << 5) 86 #define IE_RHSC (1 << 6) 87 #define IE_OC (1 << 30) 88 #define IE_MIE (1 << 31) 89 87 90 volatile uint32_t interrupt_disable; 88 #define I_SO (1 << 0) /* Scheduling overrun */89 #define I_WDH (1 << 1) /* Done head write-back */90 #define I_SF (1 << 2) /* Start of frame */91 #define I_RD (1 << 3) /* Resume detect */92 #define I_UE (1 << 4) /* Unrecoverable error */93 #define I_FNO (1 << 5) /* Frame number overflow */94 #define I_RHSC (1 << 6) /* Root hub status change */95 #define I_OC (1 << 30) /* Ownership change */96 #define I_MI (1 << 31) /* Master interrupt (all/any interrupts) */97 98 /** HCCA pointer (see hw_struct hcca.h) */99 91 volatile uint32_t hcca; 100 #define HCCA_PTR_MASK 0xffffff00 /* HCCA is 256B aligned */ 101 102 /** Currently executed period endpoint */ 103 const volatile uint32_t period_current; 104 105 /** The first control endpoint */ 92 volatile uint32_t period_corrent; 106 93 volatile uint32_t control_head; 107 108 /** Currently executed control endpoint */109 94 volatile uint32_t control_current; 110 111 /** The first bulk endpoint */112 95 volatile uint32_t bulk_head; 113 114 /** Currently executed bulk endpoint */115 96 volatile uint32_t bulk_current; 116 117 /** Done TD list, this value is periodically written to HCCA */ 118 const volatile uint32_t done_head; 119 120 /** Frame time and max packet size for all transfers */ 97 volatile uint32_t done_head; 121 98 volatile uint32_t fm_interval; 122 #define FMI_FI_MASK (0x3fff) /* Frame interval in bit times (should be 11999)*/ 123 #define FMI_FI_SHIFT (0) 124 #define FMI_FSMPS_MASK (0x7fff) /* Full speed max packet size */ 125 #define FMI_FSMPS_SHIFT (16) 126 #define FMI_TOGGLE_FLAG (1 << 31) 127 128 /** Bit times remaining in current frame */ 129 const volatile uint32_t fm_remaining; 130 #define FMR_FR_MASK FMI_FI_MASK 131 #define FMR_FR_SHIFT FMI_FI_SHIFT 132 #define FMR_TOGGLE_FLAG FMI_TOGGLE_FLAG 133 134 /** Frame number */ 135 const volatile uint32_t fm_number; 136 #define FMN_NUMBER_MASK (0xffff) 137 138 /** Remaining bit time in frame to start periodic transfers */ 99 volatile uint32_t fm_remaining; 100 volatile uint32_t fm_number; 139 101 volatile uint32_t periodic_start; 140 #define PS_PS_MASK (0x3fff) /* bit time when periodic get priority (0x3e67) */141 142 /** Threshold for starting LS transaction */143 102 volatile uint32_t ls_threshold; 144 #define LST_LST_MASK (0x7fff)145 146 /** The first root hub control register */147 103 volatile uint32_t rh_desc_a; 148 #define RHDA_NDS_MASK (0xff) /* Number of downstream ports, max 15 */149 #define RHDA_NDS_SHIFT (0)150 #define RHDA_PSM_FLAG (1 << 8) /* Power switching mode: 0-global, 1-per port*/151 #define RHDA_NPS_FLAG (1 << 9) /* No power switch: 1-power on, 0-use PSM*/152 #define RHDA_DT_FLAG (1 << 10) /* 1-Compound device, must be 0 */153 #define RHDA_OCPM_FLAG (1 << 11) /* Over-current mode: 0-global, 1-per port */154 #define RHDA_NOCP (1 << 12) /* OC control: 0-use OCPM, 1-OC off */155 #define RHDA_POTPGT_MASK (0xff) /* Power on to power good time */156 #define RHDA_POTPGT_SHIFT (24)157 158 /** The other root hub control register */159 104 volatile uint32_t rh_desc_b; 160 #define RHDB_DR_MASK (0xffff) /* Device removable mask */161 #define RHDB_DR_SHIFT (0)162 #define RHDB_PCC_MASK (0xffff) /* Power control mask */163 #define RHDB_PCC_SHIFT (16)164 165 /* Port device removable status */166 #define RHDB_DR_FLAG(port) (((1 << port) & RHDB_DR_MASK) << RHDB_DR_SHIFT)167 /* Port power control status: 1-per port power control, 0-global power switch */168 #define RHDB_PPC_FLAG(port) (((1 << port) & RHDB_DR_MASK) << RHDB_DR_SHIFT)169 170 /** Root hub status register */171 105 volatile uint32_t rh_status; 172 #define RHS_LPS_FLAG (1 << 0)/* read: 0,173 * write: 0-no effect,174 * 1-turn off port power for ports175 * specified in PPCM(RHDB), or all ports,176 * if power is set globally */177 #define RHS_CLEAR_PORT_POWER RHS_LPS_FLAG /* synonym for the above */178 #define RHS_OCI_FLAG (1 << 1)/* Over-current indicator, if per-port: 0 */179 #define RHS_DRWE_FLAG (1 << 15)/* read: 0-connect status change does not wake HC180 * 1-connect status change wakes HC181 * write: 1-set DRWE, 0-no effect */182 #define RHS_SET_DRWE RHS_DRWE_FLAG183 #define RHS_LPSC_FLAG (1 << 16)/* read: 0,184 * write: 0-no effect185 * 1-turn on port power for ports186 * specified in PPCM(RHDB), or all ports,187 * if power is set globally */188 #define RHS_SET_PORT_POWER RHS_LPSC_FLAG /* synonym for the above */189 #define RHS_OCIC_FLAG (1 << 17)/* Over-current indicator change */190 #define RHS_CLEAR_DRWE (1 << 31)191 192 /** Root hub per port status */193 106 volatile uint32_t rh_port_status[]; 194 #define RHPS_CCS_FLAG (1 << 0) /* r: current connect status,195 * w: 1-clear port enable, 0-nothing */196 #define RHPS_CLEAR_PORT_ENABLE RHPS_CCS_FLAG197 #define RHPS_PES_FLAG (1 << 1) /* r: port enable status198 * w: 1-set port enable, 0-nothing */199 #define RHPS_SET_PORT_ENABLE RHPS_PES_FLAG200 #define RHPS_PSS_FLAG (1 << 2) /* r: port suspend status201 * w: 1-set port suspend, 0-nothing */202 #define RHPS_SET_PORT_SUSPEND RHPS_PSS_FLAG203 #define RHPS_POCI_FLAG (1 << 3) /* r: port over-current (if reports are per-port204 * w: 1-clear port suspend (start resume205 * if suspened)206 * 0-nothing */207 #define RHPS_CLEAR_PORT_SUSPEND RHPS_POCI_FLAG208 #define RHPS_PRS_FLAG (1 << 4) /* r: port reset status209 * w: 1-set port reset, 0-nothing */210 #define RHPS_SET_PORT_RESET RHPS_PRS_FLAG211 #define RHPS_PPS_FLAG (1 << 8) /* r: port power status212 * w: 1-set port power, 0-nothing */213 #define RHPS_SET_PORT_POWER RHPS_PPS_FLAG214 #define RHPS_LSDA_FLAG (1 << 9) /* r: low speed device attached215 * w: 1-clear port power, 0-nothing */216 #define RHPS_CLEAR_PORT_POWER RHPS_LSDA_FLAG217 #define RHPS_CSC_FLAG (1 << 16) /* connect status change Write-Clean */218 #define RHPS_PESC_FLAG (1 << 17) /* port enable status change WC */219 #define RHPS_PSSC_FLAG (1 << 18) /* port suspend status change WC */220 #define RHPS_OCIC_FLAG (1 << 19) /* port over-current change WC */221 #define RHPS_PRSC_FLAG (1 << 20) /* port reset status change WC */222 #define RHPS_CHANGE_WC_MASK 0x1f0000223 107 } __attribute__((packed)) ohci_regs_t; 224 108 #endif
Note:
See TracChangeset
for help on using the changeset viewer.
