Changeset 216cb85 in mainline


Ignore:
Timestamp:
2009-12-07T22:01:29Z (15 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
3063d56
Parents:
45d5f86 (diff), cd769305 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge support for Restartable Atomic Sequences for arm32.

Files:
2 added
8 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/arm32/Makefile.inc

    r45d5f86 r216cb85  
    6161        arch/$(KARCH)/src/mm/page.c \
    6262        arch/$(KARCH)/src/mm/tlb.c \
    63         arch/$(KARCH)/src/mm/page_fault.c
     63        arch/$(KARCH)/src/mm/page_fault.c \
     64        arch/$(KARCH)/src/ras.c
    6465
    6566ifeq ($(MACHINE),testarm)
  • kernel/arch/arm32/src/arm32.c

    r45d5f86 r216cb85  
    4848#include <macros.h>
    4949#include <string.h>
     50#include <arch/ras.h>
    5051
    5152#ifdef MACHINE_testarm
     
    8889        exception_init();
    8990        interrupt_init();
     91
     92        /* Initialize Restartable Atomic Sequences support. */
     93        ras_init();
    9094       
    9195        machine_output_init();
  • kernel/arch/arm32/src/exc_handler.S

    r45d5f86 r216cb85  
    148148        mov r0, #0
    149149        mov r1, r13
    150         bl exc_dispatch
     150        bl ras_check
    151151        LOAD_REGS_FROM_STACK
    152152
     
    156156        mov r0, #5
    157157        mov r1, r13
    158         bl exc_dispatch
     158        bl ras_check
    159159        LOAD_REGS_FROM_STACK
    160160
     
    164164        mov r0, #6
    165165        mov r1, r13
    166         bl exc_dispatch
     166        bl ras_check
    167167        LOAD_REGS_FROM_STACK
    168168
     
    171171        mov r0, #1
    172172        mov r1, r13
    173         bl exc_dispatch
     173        bl ras_check
    174174        LOAD_REGS_FROM_STACK
    175175
     
    179179        mov r0, #3
    180180        mov r1, r13
    181         bl exc_dispatch
     181        bl ras_check
    182182        LOAD_REGS_FROM_STACK
    183183
     
    187187        mov r0, #4
    188188        mov r1, r13
    189         bl exc_dispatch
     189        bl ras_check
    190190        LOAD_REGS_FROM_STACK
    191191
     
    195195        mov r0, #2
    196196        mov r1, r13
    197         bl exc_dispatch
     197        bl ras_check
    198198        LOAD_REGS_FROM_STACK
    199199
  • kernel/arch/arm32/src/userspace.c

    r45d5f86 r216cb85  
    3535
    3636#include <userspace.h>
     37#include <arch/ras.h>
    3738
    3839/** Struct for holding all general purpose registers.
     
    7475        ustate.r1 = 0;
    7576
     77        /* pass the RAS page address in %r2 */
     78        ustate.r2 = (uintptr_t) ras_page;
     79
    7680        /* clear other registers */
    77         ustate.r2 = ustate.r3  = ustate.r4  = ustate.r5 =
    78             ustate.r6  = ustate.r7  = ustate.r8  = ustate.r9 = ustate.r10 =
    79             ustate.r11 = ustate.r12 = ustate.lr = 0;
     81        ustate.r3  = ustate.r4  = ustate.r5 = ustate.r6 = ustate.r7 =
     82            ustate.r8 = ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 =
     83            ustate.lr = 0;
    8084
    8185        /* set user stack */
  • uspace/lib/libc/arch/arm32/include/atomic.h

    r45d5f86 r216cb85  
    3737#define LIBC_arm32_ATOMIC_H_
    3838
     39#define LIBC_ARCH_ATOMIC_H_
     40#define CAS
     41
     42#include <atomicdflt.h>
    3943#include <bool.h>
     44#include <sys/types.h>
    4045
    41 typedef struct atomic {
    42         volatile long count;
    43 } atomic_t;
    44 
    45 static inline void atomic_set(atomic_t *val, long i)
    46 {
    47         val->count = i;
    48 }
    49 
    50 static inline long atomic_get(atomic_t *val)
    51 {
    52         return val->count;
    53 }
     46extern uintptr_t *ras_page;
    5447
    5548static inline bool cas(atomic_t *val, long ov, long nv)
    5649{
    57         /* FIXME: is not atomic */
    58         if (val->count == ov) {
    59                 val->count = nv;
    60                 return true;
    61         }
    62         return false;
     50        long ret = 0;
     51
     52        /*
     53         * The following instructions between labels 1 and 2 constitute a
     54         * Restartable Atomic Seqeunce. Should the sequence be non-atomic,
     55         * the kernel will restart it.
     56         */
     57        asm volatile (
     58                "1:\n"
     59                "       adr %[ret], 1b\n"
     60                "       str %[ret], %[rp0]\n"
     61                "       adr %[ret], 2f\n"
     62                "       str %[ret], %[rp1]\n"
     63                "       ldr %[ret], %[addr]\n"
     64                "       cmp %[ret], %[ov]\n"
     65                "       streq %[nv], %[addr]\n"
     66                "2:\n"
     67                "       moveq %[ret], #1\n"
     68                "       movne %[ret], #0\n"
     69                : [ret] "+&r" (ret),
     70                  [rp0] "=m" (ras_page[0]),
     71                  [rp1] "=m" (ras_page[1]),
     72                  [addr] "+m" (val->count)
     73                : [ov] "r" (ov),
     74                  [nv] "r" (nv)
     75                : "memory"
     76        );
     77
     78        ras_page[0] = 0;
     79        asm volatile ("" ::: "memory");
     80        ras_page[1] = 0xffffffff;
     81
     82        return (bool) ret;
    6383}
    6484
     
    7292static inline long atomic_add(atomic_t *val, int i)
    7393{
    74         int ret;
    75         volatile long * mem = &(val->count);
     94        long ret = 0;
    7695
    77         /* FIXME: is not atomic, is broken */
     96        /*
     97         * The following instructions between labels 1 and 2 constitute a
     98         * Restartable Atomic Seqeunce. Should the sequence be non-atomic,
     99         * the kernel will restart it.
     100         */
    78101        asm volatile (
    79         "1:\n"
    80                 "ldr r2, [%1]\n"
    81                 "add r3, r2, %2\n"
    82                 "str r3, %0\n"
    83                 "swp r3, r3, [%1]\n"
    84                 "cmp r3, r2\n"
    85                 "bne 1b\n"
     102                "1:\n"
     103                "       adr %[ret], 1b\n"
     104                "       str %[ret], %[rp0]\n"
     105                "       adr %[ret], 2f\n"
     106                "       str %[ret], %[rp1]\n"
     107                "       ldr %[ret], %[addr]\n"
     108                "       add %[ret], %[ret], %[imm]\n"
     109                "       str %[ret], %[addr]\n"
     110                "2:\n"
     111                : [ret] "+&r" (ret),
     112                  [rp0] "=m" (ras_page[0]),
     113                  [rp1] "=m" (ras_page[1]),
     114                  [addr] "+m" (val->count)
     115                : [imm] "r" (i)
     116        );
    86117
    87                 : "=m" (ret)
    88                 : "r" (mem), "r" (i)
    89                 : "r3", "r2"
    90         );
     118        ras_page[0] = 0;
     119        asm volatile ("" ::: "memory");
     120        ras_page[1] = 0xffffffff;
    91121
    92122        return ret;
  • uspace/lib/libc/arch/arm32/src/entry.s

    r45d5f86 r216cb85  
    3636#
    3737# r1 contains the PCB pointer
     38# r2 contains the RAS page address
    3839#
    3940__entry:
     41        # Store the RAS page address into the ras_page variable
     42        ldr r0, =ras_page
     43        str r2, [r0]
     44
    4045        # Pass pcb_ptr to __main as the first argument (in r0)
    4146        mov r0, r1
     
    4348
    4449        bl __exit
     50
     51.data
     52
     53.global ras_page
     54ras_page:
     55        .long 0
     56
  • uspace/lib/libc/include/atomicdflt.h

    r45d5f86 r216cb85  
    5656}
    5757
     58#ifndef CAS
    5859static inline bool cas(atomic_t *val, long ov, long nv)
    5960{
    6061        return __sync_bool_compare_and_swap(&val->count, ov, nv);
    6162}
     63#endif
    6264
    6365#endif
  • uspace/srv/loader/arch/arm32/arm32.s

    r45d5f86 r216cb85  
    3636# Jump to a program entry point
    3737program_run:
     38        # load ras_page address to r2
     39        ldr r2, =ras_page
     40        ldr r2, [r2]
    3841        # pcb is passed to the entry point in r1 (where it already is)
    3942        mov r15, r0
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