Changeset 17a20bc in mainline


Ignore:
Timestamp:
2005-11-07T13:47:17Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
83817ea
Parents:
77593a76
Message:

ia64 work.
Do not break memory stack alignment in heavyweight interrupt handler.
Reserve scratch area for nested procedure calls on memory stack.

Location:
arch/ia64
Files:
1 added
2 edited

Legend:

Unmodified
Added
Removed
  • arch/ia64/include/context.h

    r77593a76 r17a20bc  
    3333#include <typedefs.h>
    3434#include <align.h>
    35 
    36 #define STACK_ITEM_SIZE                 16
    37 #define STACK_ALIGNMENT                 16
    38 #define REGISTER_STACK_ALIGNMENT        8
     35#include <arch/stack.h>
    3936
    4037/*
  • arch/ia64/src/ivt.S

    r77593a76 r17a20bc  
    2727#
    2828
     29#include <arch/stack.h>
     30
     31#define STACK_ITEMS             12
     32#define STACK_FRAME_SIZE        ((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE)
     33
     34#if (STACK_FRAME_SIZE % STACK_ALIGNMENT != 0)
     35#error Memory stack must be 16-byte aligned.
     36#endif
    2937
    3038/** Heavyweight interrupt handler
     
    5866       
    5967    /* 4. save registers in bank 0 into memory stack */
    60         add r12 = -8, r12 ;;
    61        
    62         st8 [r12] = r29, -8 ;;  /* save predicate registers */
    63 
    64         st8 [r12] = r24, -8 ;;  /* save cr.iip */
    65         st8 [r12] = r25, -8 ;;  /* save cr.ipsr */
    66         st8 [r12] = r26, -8 ;;  /* save cr.iipa */
    67         st8 [r12] = r27, -8 ;;  /* save cr.isr */
    68         st8 [r12] = r28, -8 ;;  /* save cr.ifa */               
     68        add r31 = -8, r12 ;;
     69        add r12 = -STACK_FRAME_SIZE, r12 ;;
     70       
     71        st8 [r31] = r29, -8 ;;  /* save predicate registers */
     72
     73        st8 [r31] = r24, -8 ;;  /* save cr.iip */
     74        st8 [r31] = r25, -8 ;;  /* save cr.ipsr */
     75        st8 [r31] = r26, -8 ;;  /* save cr.iipa */
     76        st8 [r31] = r27, -8 ;;  /* save cr.isr */
     77        st8 [r31] = r28, -8 ;;  /* save cr.ifa */               
    6978
    7079    /* 5. RSE switch from interrupted context */
     
    7584        mov r26 = cr.ifs
    7685       
    77         st8 [r12] = r24, -8     /* save ar.rsc */
    78         st8 [r12] = r25, -8     /* save ar.pfs */
    79         st8 [r12] = r26, -8     /* save ar.ifs */
     86        st8 [r31] = r24, -8     /* save ar.rsc */
     87        st8 [r31] = r25, -8     /* save ar.pfs */
     88        st8 [r31] = r26, -8     /* save ar.ifs */
    8089       
    8190        and r30 = ~3, r24
     
    9099        mov r29 = ar.bsp
    91100       
    92         st8 [r12] = r27, -8     /* save ar.rnat */
    93         st8 [r12] = r28, -8     /* save ar.bspstore */
    94         st8 [r12] = r29         /* save ar.bsp */
     101        st8 [r31] = r27, -8     /* save ar.rnat */
     102        st8 [r31] = r28, -8     /* save ar.bspstore */
     103        st8 [r31] = r29         /* save ar.bsp */
    95104       
    96105        mov ar.rsc = r24        /* restore RSE's setting */
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