Changeset 149d14e5 in mainline
- Timestamp:
- 2009-04-06T16:18:41Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 13a638d
- Parents:
- 415d272
- Location:
- kernel
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/src/amd64.c
r415d272 r149d14e5 282 282 } 283 283 284 void arch_reboot(void) 285 { 286 #ifdef CONFIG_PC_KBD 287 i8042_cpu_reset((i8042_t *) I8042_BASE); 288 #endif 289 } 290 284 291 /** @} 285 292 */ -
kernel/arch/amd64/src/pm.c
r415d272 r149d14e5 231 231 } 232 232 233 /* Reboot the machine by initiating234 * a triple fault235 */236 void arch_reboot(void)237 {238 preemption_disable();239 ipl_t ipl = interrupts_disable();240 241 memsetb(idt, sizeof(idt), 0);242 idtr_load(&idtr);243 244 interrupts_restore(ipl);245 asm volatile (246 "int $0x03\n"247 "cli\n"248 "hlt\n"249 );250 }251 252 233 /** @} 253 234 */ -
kernel/arch/ia32/src/ia32.c
r415d272 r149d14e5 238 238 } 239 239 240 void arch_reboot(void) 241 { 242 #ifdef CONFIG_PC_KBD 243 i8042_cpu_reset((i8042_t *) I8042_BASE); 244 #endif 245 } 246 240 247 /** @} 241 248 */ -
kernel/arch/ia32/src/pm.c
r415d272 r149d14e5 233 233 } 234 234 235 /* Reboot the machine by initiating236 * a triple fault237 */238 void arch_reboot(void)239 {240 preemption_disable();241 ipl_t ipl = interrupts_disable();242 243 memsetb(idt, sizeof(idt), 0);244 245 ptr_16_32_t idtr;246 idtr.limit = sizeof(idt);247 idtr.base = (uintptr_t) idt;248 idtr_load(&idtr);249 250 interrupts_restore(ipl);251 asm volatile (252 "int $0x03\n"253 "cli\n"254 "hlt\n"255 );256 }257 258 235 /** @} 259 236 */ -
kernel/genarch/include/drivers/i8042/i8042.h
r415d272 r149d14e5 54 54 55 55 extern indev_t *i8042_init(i8042_t *, inr_t); 56 extern void i8042_cpu_reset(i8042_t *); 56 57 57 58 #endif -
kernel/genarch/src/drivers/i8042/i8042.c
r415d272 r149d14e5 51 51 #define i8042_SET_COMMAND 0x60 52 52 #define i8042_COMMAND 0x69 53 #define i8042_CPU_RESET 0xfe 53 54 54 55 #define i8042_BUFFER_FULL_MASK 0x01 … … 98 99 irq_register(&instance->irq); 99 100 100 /* 101 * Clear input buffer. 102 */ 101 /* Clear input buffer */ 103 102 while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK) 104 103 (void) pio_read_8(&dev->data); … … 107 106 } 108 107 108 /* Reset CPU by pulsing pin 0 */ 109 void i8042_cpu_reset(i8042_t *dev) 110 { 111 interrupts_disable(); 112 113 /* Clear input buffer */ 114 while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK) 115 (void) pio_read_8(&dev->data); 116 117 /* Reset CPU */ 118 pio_write_8(&dev->status, i8042_CPU_RESET); 119 } 120 109 121 /** @} 110 122 */
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