Changes in kernel/arch/mips32/src/start.S [96e0748d:0cb47cf] in mainline
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kernel/arch/mips32/src/start.S (modified) (12 diffs)
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kernel/arch/mips32/src/start.S
r96e0748d r0cb47cf 45 45 .global userspace_asm 46 46 47 # Which status bits should are thread-local 48 #define REG_SAVE_MASK 0x1f # KSU(UM), EXL, ERL, IE 49 50 # Save registers to space defined by \r 51 # We will change status: Disable ERL,EXL,UM,IE 52 # These changes will be automatically reversed in REGISTER_LOAD 53 # SP is NOT saved as part of these registers 47 /* 48 * Which status bits should are thread-local: 49 * KSU(UM), EXL, ERL, IE 50 */ 51 #define REG_SAVE_MASK 0x1f 52 53 /* 54 * Save registers to space defined by \r 55 * We will change status: Disable ERL, EXL, UM, IE 56 * These changes will be automatically reversed in REGISTER_LOAD 57 * %sp is NOT saved as part of these registers 58 */ 54 59 .macro REGISTERS_STORE_AND_EXC_RESET r 55 60 sw $at, EOFFSET_AT(\r) … … 70 75 sw $t8, EOFFSET_T8(\r) 71 76 sw $t9, EOFFSET_T9(\r) 72 77 73 78 mflo $at 74 79 sw $at, EOFFSET_LO(\r) … … 79 84 sw $ra, EOFFSET_RA(\r) 80 85 sw $k1, EOFFSET_K1(\r) 81 86 82 87 mfc0 $t0, $status 83 88 mfc0 $t1, $epc 84 89 85 and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE 86 li $t3, ~(0x1f) 87 and $t0, $t0, $t3 # Clear KSU,EXL,ERL,IE 88 89 sw $t2,EOFFSET_STATUS(\r) 90 sw $t1,EOFFSET_EPC(\r) 90 /* save only KSU, EXL, ERL, IE */ 91 and $t2, $t0, REG_SAVE_MASK 92 93 /* clear KSU, EXL, ERL, IE */ 94 li $t3, ~(REG_SAVE_MASK) 95 and $t0, $t0, $t3 96 97 sw $t2, EOFFSET_STATUS(\r) 98 sw $t1, EOFFSET_EPC(\r) 91 99 mtc0 $t0, $status 92 100 .endm 93 101 94 102 .macro REGISTERS_LOAD r 95 # Update only UM,EXR,IE from status, the rest 96 # is controlled by OS and not bound to task 103 /* 104 * Update only UM, EXR, IE from status, the rest 105 * is controlled by OS and not bound to task. 106 */ 97 107 mfc0 $t0, $status 98 108 lw $t1,EOFFSET_STATUS(\r) 99 100 li $t2, ~REG_SAVE_MASK # Mask UM,EXL,ERL,IE 109 110 /* mask UM, EXL, ERL, IE */ 111 li $t2, ~REG_SAVE_MASK 101 112 and $t0, $t0, $t2 102 113 103 or $t0, $t0, $t1 # Copy UM,EXL, ERL, IE from saved status 114 /* copy UM, EXL, ERL, IE from saved status */ 115 or $t0, $t0, $t1 104 116 mtc0 $t0, $status 105 117 … … 129 141 lw $at, EOFFSET_HI(\r) 130 142 mthi $at 131 143 132 144 lw $at, EOFFSET_EPC(\r) 133 145 mtc0 $at, $epc … … 137 149 .endm 138 150 139 # Move kernel stack pointer address to register K0 140 # - if we are in user mode, load the appropriate stack 141 # address 151 /* 152 * Move kernel stack pointer address to register $k0. 153 * If we are in user mode, load the appropriate stack address. 154 */ 142 155 .macro KERNEL_STACK_TO_K0 143 # If we are in user mode156 /* if we are in user mode */ 144 157 mfc0 $k0, $status 145 158 andi $k0, 0x10 … … 148 161 add $k0, $sp, 0 149 162 150 # Move $k0 pointer to kernel stack163 /* move $k0 pointer to kernel stack */ 151 164 lui $k0, %hi(supervisor_sp) 152 165 ori $k0, $k0, %lo(supervisor_sp) 153 # Move $k0 (superveisor_sp) 166 167 /* move $k0 (supervisor_sp) */ 154 168 lw $k0, 0($k0) 155 1: 169 170 1: 156 171 .endm 157 172 158 173 .org 0x0 159 174 kernel_image_start: 160 /* Load temporary stack */175 /* load temporary stack */ 161 176 lui $sp, %hi(end_stack) 162 177 ori $sp, $sp, %lo(end_stack) 163 178 164 /* Not sure about this, but might 165 be needed for PIC code */ 179 /* not sure about this, but might be needed for PIC code */ 166 180 lui $gp, 0x8000 167 181 168 182 /* $a1 contains physical address of bootinfo_t */ 169 170 183 jal arch_pre_main 171 184 nop … … 174 187 nop 175 188 176 189 .space TEMP_STACK_SIZE 177 190 end_stack: 178 191 … … 191 204 exception_handler: 192 205 KERNEL_STACK_TO_K0 206 193 207 sub $k0, REGISTER_SPACE 194 208 sw $sp, EOFFSET_SP($k0) … … 197 211 mfc0 $k0, $cause 198 212 199 sra $k0, $k0, 0x2 # cp0_exc_cause() part 1200 andi $k0, $k0, 0x1f # cp0_exc_cause() part 2201 sub $k0, 8 # 8 = SYSCALL213 sra $k0, $k0, 0x2 /* cp0_exc_cause() part 1 */ 214 andi $k0, $k0, 0x1f /* cp0_exc_cause() part 2 */ 215 sub $k0, 8 /* 8 = SYSCALL */ 202 216 203 217 beqz $k0, syscall_shortcut 204 add $k0, 8 # Revert $k0 back to correct exc number218 add $k0, 8 /* revert $k0 back to correct exc number */ 205 219 206 220 REGISTERS_STORE_AND_EXC_RESET $sp 207 221 208 222 move $a1, $sp 209 jal exc_dispatch # exc_dispatch(excno, register_space)223 jal exc_dispatch /* exc_dispatch(excno, register_space) */ 210 224 move $a0, $k0 211 225 212 226 REGISTERS_LOAD $sp 213 # The $sp is automatically restored to former value 214 eret 215 216 ## Syscall entry 217 # 218 # Registers: 219 # 220 # @param v0 Syscall number. 221 # @param a0 1st argument. 222 # @param a1 2nd argument. 223 # @param a2 3rd argument. 224 # @param a3 4th argument. 225 # @param t0 5th argument. 226 # @param t1 6th argument. 227 # 228 # @return The return value will be stored in v0. 229 # 230 #define SS_SP EOFFSET_SP 231 #define SS_STATUS EOFFSET_STATUS 232 #define SS_EPC EOFFSET_EPC 233 #define SS_K1 EOFFSET_K1 227 /* the $sp is automatically restored to former value */ 228 eret 229 230 #define SS_SP EOFFSET_SP 231 #define SS_STATUS EOFFSET_STATUS 232 #define SS_EPC EOFFSET_EPC 233 #define SS_K1 EOFFSET_K1 234 235 /** Syscall entry 236 * 237 * Registers: 238 * 239 * @param $v0 Syscall number. 240 * @param $a0 1st argument. 241 * @param $a1 2nd argument. 242 * @param $a2 3rd argument. 243 * @param $a3 4th argument. 244 * @param $t0 5th argument. 245 * @param $t1 6th argument. 246 * 247 * @return The return value will be stored in $v0. 248 * 249 */ 234 250 syscall_shortcut: 235 # We have a lot of space on the stack, with free use251 /* we have a lot of space on the stack, with free use */ 236 252 mfc0 $t3, $epc 237 253 mfc0 $t2, $status 238 sw $t3, SS_EPC($sp) # Save EPC239 sw $k1, SS_K1($sp) # Save k1 not saved on context switch240 241 and $t4, $t2, REG_SAVE_MASK # Save only KSU, EXL, ERL, IE254 sw $t3, SS_EPC($sp) /* save EPC */ 255 sw $k1, SS_K1($sp) /* save $k1 not saved on context switch */ 256 257 and $t4, $t2, REG_SAVE_MASK /* save only KSU, EXL, ERL, IE */ 242 258 li $t5, ~(0x1f) 243 and $t2, $t2, $t5 # Clear KSU, EXL, ERL244 ori $t2, $t2, 0x1 # Set IE245 259 and $t2, $t2, $t5 /* clear KSU, EXL, ERL */ 260 ori $t2, $t2, 0x1 /* set IE */ 261 246 262 sw $t4, SS_STATUS($sp) 247 263 mtc0 $t2, $status 248 249 # 250 # Call the higher level system call handler 251 # We are going to reuse part of the unused exception stack frame 252 # 253 sw $t0, STACK_ARG4($sp) # save the 5th argument on the stack 254 sw $t1, STACK_ARG5($sp) # save the 6th argument on the stack 264 265 /* 266 * Call the higher level system call handler. 267 * We are going to reuse part of the unused exception stack frame. 268 * 269 */ 270 sw $t0, STACK_ARG4($sp) /* save the 5th argument on the stack */ 271 sw $t1, STACK_ARG5($sp) /* save the 6th argument on the stack */ 255 272 jal syscall_handler 256 sw $v0, STACK_ARG6($sp) # save the syscall number on the stack257 258 # restore status273 sw $v0, STACK_ARG6($sp) /* save the syscall number on the stack */ 274 275 /* restore status */ 259 276 mfc0 $t2, $status 260 277 lw $t3, SS_STATUS($sp) 261 262 # Change back to EXL = 1 (from last exception), otherwise 263 # an interrupt could rewrite the CP0 - EPC 264 li $t4, ~REG_SAVE_MASK # Mask UM, EXL, ERL, IE 278 279 /* 280 * Change back to EXL = 1 (from last exception), otherwise 281 * an interrupt could rewrite the CP0 - EPC. 282 * 283 */ 284 li $t4, ~REG_SAVE_MASK /* mask UM, EXL, ERL, IE */ 265 285 and $t2, $t2, $t4 266 or $t2, $t2, $t3 # Copy saved UM, EXL, ERL, IE286 or $t2, $t2, $t3 /* copy saved UM, EXL, ERL, IE */ 267 287 mtc0 $t2, $status 268 269 # restore epc + 4288 289 /* restore epc + 4 */ 270 290 lw $t2, SS_EPC($sp) 271 291 lw $k1, SS_K1($sp) … … 273 293 mtc0 $t2, $epc 274 294 275 lw $sp, SS_SP($sp) # restore sp 276 277 eret 278 295 lw $sp, SS_SP($sp) /* restore $sp */ 296 eret 297 279 298 tlb_refill_handler: 280 299 KERNEL_STACK_TO_K0 … … 283 302 sw $sp,EOFFSET_SP($k0) 284 303 add $sp, $k0, 0 285 304 286 305 jal tlb_refill 287 306 add $a0, $sp, 0 288 307 289 308 REGISTERS_LOAD $sp 290 291 309 eret 292 310 … … 297 315 sw $sp,EOFFSET_SP($k0) 298 316 add $sp, $k0, 0 299 317 300 318 jal cache_error 301 add $a0, $sp, 0 302 319 add $a0, $sp, 0 320 303 321 REGISTERS_LOAD $sp 304 305 322 eret 306 323 307 324 userspace_asm: 308 325 add $sp, $a0, 0 309 add $v0, $a1, 0 310 add $t9, $a2, 0 # Set up correct entry into PIC code311 xor $a0, $a0, $a0 # $a0 is defined to hold pcb_ptr312 # set it to 0313 eret 326 add $v0, $a1, 0 327 add $t9, $a2, 0 /* set up correct entry into PIC code */ 328 xor $a0, $a0, $a0 /* $a0 is defined to hold pcb_ptr */ 329 /* set it to 0 */ 330 eret
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