Changeset 05d9dd89 in mainline


Ignore:
Timestamp:
2005-11-03T21:55:52Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
dd118f0
Parents:
0259524
Message:

ia64 work.
Fix definition of u32.
Add more register manipulation functions.
Add unions describing bit-structured registers.
Distinguish between timer, unhandled and spurious external interrupts.
Initialize interval timer to generate first timer interrupt.

Location:
arch/ia64
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • arch/ia64/include/asm.h

    r0259524 r05d9dd89  
    9393}
    9494
     95/** Read ITV (Interval Timer Vector) register.
     96 *
     97 * @return Current vector and mask bit.
     98 */
     99static inline __u64 itv_read(void)
     100{
     101        __u64 v;
     102       
     103        __asm__ volatile ("mov %0 = cr.itv\n" : "=r" (v));
     104       
     105        return v;
     106}
     107
    95108/** Write ITV (Interval Timer Vector) register.
    96109 *
    97  * @param New vector and masked bit.
     110 * @param New vector and mask bit.
    98111 */
    99112static inline void itv_write(__u64 v)

  • arch/ia64/include/interrupt.h

    r0259524 r05d9dd89  
    3030#define __ia64_INTERRUPT_H__
    3131
     32#define INTERRUPT_TIMER         0
     33#define INTERRUPT_SPURIOUS      15
     34
    3235extern void external_interrupt(void);
    3336

  • arch/ia64/include/register.h

    r0259524 r05d9dd89  
    3333
    3434#define CR_IVR_MASK     0xf
    35 
    3635#define PSR_I_MASK      0x4000
    3736
     37/** External Interrupt Vector Register */
     38union cr_ivr {
     39        __u8  vector;
     40        __u64 value;
     41};
     42
     43typedef union cr_ivr cr_ivr_t;
     44
     45/** Task Priority Register */
     46union cr_tpr {
     47        struct {
     48                unsigned : 4;
     49                unsigned mic: 4;                /**< Mask Interrupt Class. */
     50                unsigned : 8;
     51                unsigned mmi: 1;                /**< Mask Maskable Interrupts. */
     52        } __attribute__ ((packed));
     53        __u64 value;
     54};
     55
     56typedef union cr_tpr cr_tpr_t;
     57
     58/** Interval Timer Vector */
     59union cr_itv {
     60        struct {
     61                unsigned vector : 8;
     62                unsigned : 4;
     63                unsigned : 1;
     64                unsigned : 3;
     65                unsigned m : 1;                 /**< Mask. */
     66        } __attribute__ ((packed));
     67        __u64 value;
     68};
     69
     70typedef union cr_itv cr_itv_t;
     71
    3872#endif

  • arch/ia64/include/types.h

    r0259524 r05d9dd89  
    3636typedef unsigned char __u8;
    3737typedef unsigned short __u16;
    38 typedef unsigned long __u32;
    39 typedef long long __u64;
     38typedef unsigned int __u32;
     39typedef unsigned long __u64;
    4040
    4141typedef __u64 __address;

  • arch/ia64/src/ia64.c

    r0259524 r05d9dd89  
    2929#include <arch.h>
    3030#include <arch/ski/ski.h>
     31#include <arch/asm.h>
     32#include <arch/register.h>
     33#include <arch/barrier.h>
     34#include <arch/interrupt.h>
     35
     36/** TODO: read ticks per second from firmware */
     37#define IT_DELTA        50000000
    3138
    3239void arch_pre_mm_init(void)
    … …  
    3744void arch_post_mm_init(void)
    3845{
     46        cr_itv_t itv;
     47
     48        /* initialize Interval Timer external interrupt vector */
     49        itv.value = itv_read();
     50        itv.vector = INTERRUPT_TIMER;
     51        itv.m = 0;
     52        itv_write(itv.value);
     53        srlz_d();
     54
     55        /* set Interval Timer Counter to zero */
     56        itc_write(0);
     57        srlz_d();
     58       
     59        /* generate first Interval Timer interrupt in IT_DELTA ticks */
     60        itm_write(IT_DELTA);
     61        srlz_d();
    3962}

  • arch/ia64/src/interrupt.c

    r0259524 r05d9dd89  
    3030#include <arch/interrupt.h>
    3131#include <panic.h>
     32#include <print.h>
    3233#include <arch/types.h>
    3334#include <arch/asm.h>
    3435#include <arch/barrier.h>
    3536#include <arch/register.h>
     37#include <arch.h>
    3638
    3739void external_interrupt(void)
    3840{
    39         __u8 ivr;
     41        cr_ivr_t ivr;
    4042       
    41         srlz_d();
    42         ivr = ivr_read() & CR_IVR_MASK;
     43        ivr.value = ivr_read();
    4344        srlz_d();
    4445       
    45         switch(ivr) {
     46        switch(ivr.value) {
     47            case INTERRUPT_TIMER:
     48                panic("cpu%d: timer interrupt\n", CPU->id);
     49                break;
     50            case INTERRUPT_SPURIOUS:
     51                printf("cpu%d: spurious interrupt\n", CPU->id);
     52                break;
    4653            default:
    47                 panic("\nUnhandled External Interrupt Vector %d\n", ivr);
     54                panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
     55                break;
    4856        }
    4957}
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