| 72 | | * [https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/F7E732FF811F783187256FDD004D3797/$file/pem_64bit_v3.0.2005jul15.pdf PowerPC Microprocessor Family: |
| 73 | | The Programming Environments Manual for 64-bit Microprocessors] |
| | 72 | * [http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/F7E732FF811F783187256FDD004D3797/$file/pem_64bit_v3.0.2005jul15.pdf PowerPC Microprocessor Family: The Programming Environments Manual for 64-bit Microprocessors] |
| | 73 | |
| | 74 | * [http://refspecs.freestandards.org/elf/elfspec_ppc.pdf SYSTEM V APPLICATION BINARY INTERFACE PowerPC Processor Supplement] |
| | 75 | |
| | 76 | |
| | 77 | == SPARC V9 == |
| | 78 | |
| | 79 | * [http://www.sparc.org/standards/SPARCV9.pdf The SPARC Architecture Manual Version 9] |
| | 80 | |
| | 81 | * [http://www.fujitsu.com/downloads/PRMPWR/JPS1-R1.0.4-Common-pub.pdf SPARC Joint Programming Specification (JPS1): Commonality] |
| | 82 | |
| | 83 | * [http://www.sun.com/processors/manuals/802-7220-02.pdf UltraSPARC User’s Manual, UltraSPARC-I, UltraSPARC-II] |
| | 84 | |
| | 85 | * [http://www.sparc.org/standards/SCD.2.4.ps.Z SPARC COMPLIANCE DEFINITION 2.4] |
| | 86 | |
| | 87 | * [http://wikis.sun.com/display/FOSSdocs/Home FOSS Open Hardware Documentation] |
