Index: uspace/drv/uhci-hcd/uhci_hc.c
===================================================================
--- uspace/drv/uhci-hcd/uhci_hc.c	(revision 17ceb7293c4b3e05a924f81338db1e3c118dea83)
+++ uspace/drv/uhci-hcd/uhci_hc.c	(revision ff34e5aa0ca881086c2c718f37808d217179c40f)
@@ -82,5 +82,6 @@
  * interrupt fibrils.
  */
-int uhci_hc_init(uhci_hc_t *instance, ddf_fun_t *fun, void *regs, size_t reg_size)
+int uhci_hc_init(uhci_hc_t *instance, ddf_fun_t *fun,
+    void *regs, size_t reg_size, bool interrupts)
 {
 	assert(reg_size >= sizeof(regs_t));
@@ -95,4 +96,5 @@
 	} else (void) 0
 
+	instance->hw_interrupts = interrupts;
 	/* Setup UHCI function. */
 	instance->ddf_instance = fun;
@@ -113,7 +115,9 @@
 
 	uhci_hc_init_hw(instance);
-	instance->cleaner =
-	    fibril_create(uhci_hc_interrupt_emulator, instance);
-	fibril_add_ready(instance->cleaner);
+	if (!interrupts) {
+		instance->cleaner =
+		    fibril_create(uhci_hc_interrupt_emulator, instance);
+		fibril_add_ready(instance->cleaner);
+	}
 
 	instance->debug_checker = fibril_create(uhci_hc_debug_checker, instance);
@@ -149,7 +153,9 @@
 	pio_write_32(&registers->flbaseadd, pa);
 
-	/* Enable all interrupts, but resume interrupt */
-	pio_write_16(&instance->registers->usbintr,
-	    UHCI_INTR_CRC | UHCI_INTR_COMPLETE | UHCI_INTR_SHORT_PACKET);
+	if (instance->hw_interrupts) {
+		/* Enable all interrupts, but resume interrupt */
+		pio_write_16(&instance->registers->usbintr,
+		    UHCI_INTR_CRC | UHCI_INTR_COMPLETE | UHCI_INTR_SHORT_PACKET);
+	}
 
 	uint16_t status = pio_read_16(&registers->usbcmd);