Changeset f9a56c0 in mainline for kernel/arch/sparc64/src


Ignore:
Timestamp:
2006-08-17T11:39:38Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
ee289cf0
Parents:
ec2c55a
Message:

sparc64 work.
interrupt_vector trap experimental handling.
Minimal reverse-engineered FireHose Controller driver (documentation needed!).
Keyboard on Sun Enterprise is now interrupt driven. Keyboard on Sun Ultra
is still polled.

Location:
kernel/arch/sparc64/src
Files:
1 added
4 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/src/console.c

    rec2c55a rf9a56c0  
    8585        while (1) {
    8686#ifdef CONFIG_Z8530
    87                 z8530_poll();
     87                return;
    8888#endif
    8989#ifdef CONFIG_NS16550
  • kernel/arch/sparc64/src/drivers/kbd.c

    rec2c55a rf9a56c0  
    6161         * However, the physical keyboard address can
    6262         * be pretty much unaligned on some systems
    63          * (e.g. Ultra 5, Ultras 60).
     63         * (e.g. Ultra 5, Ultra 60).
    6464         */
    6565        aligned_addr = ALIGN_DOWN(bootinfo.keyboard.addr, PAGE_SIZE);
  • kernel/arch/sparc64/src/drivers/tick.c

    rec2c55a rf9a56c0  
    2727 */
    2828
    29  /** @addtogroup sparc64       
     29/** @addtogroup sparc64
    3030 * @{
    3131 */
     
    8989}
    9090
    91  /** @}
     91/** @}
    9292 */
    93 
  • kernel/arch/sparc64/src/trap/interrupt.c

    rec2c55a rf9a56c0  
    3434
    3535#include <arch/interrupt.h>
     36#include <arch/trap/interrupt.h>
    3637#include <interrupt.h>
     38#include <arch/drivers/fhc.h>
    3739#include <arch/types.h>
    3840#include <debug.h>
    3941#include <ipc/sysipc.h>
     42#include <arch/asm.h>
     43#include <arch/barrier.h>
     44
     45#include <genarch/kbd/z8530.h>
    4046
    4147/** Register Interrupt Level Handler.
     
    5965}
    6066
     67void interrupt(void)
     68{
     69        uint64_t intrcv;
     70        uint64_t data0;
     71
     72        intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
     73        data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0);
     74
     75        switch (data0) {
     76#ifdef CONFIG_Z8530
     77        case Z8530_INTRCV_DATA0:
     78                /*
     79                 * So far, we know we got this interrupt through the FHC.
     80                 * Since we don't have enough information about the FHC and
     81                 * because the interrupt looks like level sensitive,
     82                 * we cannot handle it by scheduling one of the level
     83                 * interrupt traps. Call the interrupt handler directly.
     84                 */
     85                fhc_uart_reset();
     86                z8530_interrupt();
     87                break;
     88#endif
     89        }
     90
     91        membar();
     92        asi_u64_write(ASI_INTR_RECEIVE, 0, 0);
     93}
     94
    6195/** @}
    6296 */
    63 
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