Index: kernel/arch/arm32/src/mm/page.c
===================================================================
--- kernel/arch/arm32/src/mm/page.c	(revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1)
+++ kernel/arch/arm32/src/mm/page.c	(revision f92976f9995a9c61772c6381e0c90c7b84561fff)
@@ -52,14 +52,16 @@
 void page_arch_init(void)
 {
-	int flags = PAGE_CACHEABLE;
+	int flags = PAGE_CACHEABLE | PAGE_EXEC;
 	page_mapping_operations = &pt_mapping_operations;
 
 	page_table_lock(AS_KERNEL, true);
 	
-	uintptr_t cur;
-
 	/* Kernel identity mapping */
-	for (cur = PHYSMEM_START_ADDR;
-	    cur < min(config.identity_size, config.physmem_end);
+	//FIXME: We need to consider the possibility that
+	//identity_base > identity_size and physmem_end.
+	//This might lead to overflow if identity_size is too big.
+	for (uintptr_t cur = PHYSMEM_START_ADDR;
+	    cur < min(KA2PA(config.identity_base) +
+	        config.identity_size, config.physmem_end);
 	    cur += FRAME_SIZE)
 		page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
Index: kernel/arch/arm32/src/mm/page_fault.c
===================================================================
--- kernel/arch/arm32/src/mm/page_fault.c	(revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1)
+++ kernel/arch/arm32/src/mm/page_fault.c	(revision f92976f9995a9c61772c6381e0c90c7b84561fff)
@@ -42,27 +42,38 @@
 #include <print.h>
 
-/** Returns value stored in fault status register.
+/** Returns value stored in comnbined/data fault status register.
  *
  *  @return Value stored in CP15 fault status register (FSR).
+ *
+ *  "VMSAv6 added a fifth fault status bit (bit[10]) to both the IFSR and DFSR.
+ *  It is IMPLEMENTATION DEFINED how this bit is encoded in earlier versions of
+ *  the architecture. A write flag (bit[11] of the DFSR) has also been
+ *  introduced."
+ *  ARM Architecture Reference Manual version i ch. B4.6 (PDF p. 719)
+ *
+ *  See ch. B4.9.6 for location of data/instruction FSR.
+ *
  */
-static inline fault_status_t read_fault_status_register(void)
+static inline fault_status_t read_data_fault_status_register(void)
 {
-	fault_status_union_t fsu;
+	fault_status_t fsu;
 	
-	/* fault status is stored in CP15 register 5 */
+	/* Combined/Data fault status is stored in CP15 register 5, c0. */
 	asm volatile (
 		"mrc p15, 0, %[dummy], c5, c0, 0"
-		: [dummy] "=r" (fsu.dummy)
+		: [dummy] "=r" (fsu.raw)
 	);
 	
-	return fsu.fs;
+	return fsu;
 }
 
-/** Returns FAR (fault address register) content.
+/** Returns DFAR (fault address register) content.
  *
- * @return FAR (fault address register) content (address that caused a page
+ * This register is equivalent to FAR on pre armv6 machines.
+ *
+ * @return DFAR (fault address register) content (address that caused a page
  *         fault)
  */
-static inline uintptr_t read_fault_address_register(void)
+static inline uintptr_t read_data_fault_address_register(void)
 {
 	uintptr_t ret;
@@ -77,4 +88,5 @@
 }
 
+#if defined(PROCESSOR_armv4) | defined(PROCESSOR_armv5)
 /** Decides whether read or write into memory is requested.
  *
@@ -97,5 +109,5 @@
 		panic("page_fault - instruction does not access memory "
 		    "(instr_code: %#0" PRIx32 ", badvaddr:%p).",
-		    instr_union.pc, (void *) badvaddr);
+		    *(uint32_t*)instr_union.instr, (void *) badvaddr);
 		return PF_ACCESS_EXEC;
 	}
@@ -136,4 +148,5 @@
 	    inst, (void *) badvaddr);
 }
+#endif
 
 /** Handles "data abort" exception (load or store at invalid address).
@@ -145,10 +158,15 @@
 void data_abort(unsigned int exc_no, istate_t *istate)
 {
-	fault_status_t fsr __attribute__ ((unused)) =
-	    read_fault_status_register();
-	uintptr_t badvaddr = read_fault_address_register();
+	uintptr_t badvaddr = read_data_fault_address_register();
 
-	pf_access_t access = get_memory_access_type(istate->pc, badvaddr);
-
+#if defined(PROCESSOR_armv6) | defined(PROCESSOR_armv7_a)
+	fault_status_t fsr = read_data_fault_status_register();
+	const pf_access_t access =
+	    fsr.data.wr ? PF_ACCESS_WRITE : PF_ACCESS_READ;
+#elif defined(PROCESSOR_armv4) | defined(PROCESSOR_armv5)
+	const pf_access_t access = get_memory_access_type(istate->pc, badvaddr);
+#else
+#error "Unsupported architecture"
+#endif
 	int ret = as_page_fault(badvaddr, access, istate);
 
@@ -167,4 +185,5 @@
 void prefetch_abort(unsigned int exc_no, istate_t *istate)
 {
+	/* NOTE: We should use IFAR and IFSR here. */
 	int ret = as_page_fault(istate->pc, PF_ACCESS_EXEC, istate);