Changeset f8ddd17 in mainline for kernel/arch/sparc64/src


Ignore:
Timestamp:
2006-12-09T20:20:50Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
b82a13c
Parents:
9ab9c2ec
Message:

Rework support for virtually indexed cache.
Instead of repeatedly flushing the data cache, which was a huge overkill, refuse to create an illegal address alias
in the kernel (again) and allocate appropriate page color in userspace instead. Extend the detection also to
SYS_PHYSMEM_MAP syscall.

Add support for tracking physical memory areas mappable by SYS_PHYSMEM_MAP.

Lots of coding style changes.

Location:
kernel/arch/sparc64/src
Files:
5 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/src/mm/as.c

    r9ab9c2ec rf8ddd17  
    4949#include <macros.h>
    5050#endif /* CONFIG_TSB */
    51 
    52 #ifdef CONFIG_VIRT_IDX_DCACHE
    53 #include <arch/mm/cache.h>
    54 #endif /* CONFIG_VIRT_IDX_DCACHE */
    5551
    5652/** Architecture dependent address space init. */
    … …  
    163159        dtsb_base_write(tsb_base.value);
    164160#endif
    165 #ifdef CONFIG_VIRT_IDX_DCACHE
    166         if (as->dcache_flush_on_install) {
    167                 /*
    168                  * Some mappings in this address space are illegal address
    169                  * aliases. Upon their creation, the dcache_flush_on_install
    170                  * flag was set.
    171                  *
    172                  * We are now obliged to flush the D-cache in order to guarantee
    173                  * that there will be at most one cache line for each address
    174                  * alias.
    175                  *
    176                  * This flush performs a cleanup after another address space in
    177                  * which the alias might have existed.
    178                  */
    179                 dcache_flush();
    180         }
    181 #endif /* CONFIG_VIRT_IDX_DCACHE */
    182161}
    183162
    … …  
    214193        }
    215194#endif
    216 #ifdef CONFIG_VIRT_IDX_DCACHE
    217         if (as->dcache_flush_on_deinstall) {
    218                 /*
    219                  * Some mappings in this address space are illegal address
    220                  * aliases. Upon their creation, the dcache_flush_on_deinstall
    221                  * flag was set.
    222                  *
    223                  * We are now obliged to flush the D-cache in order to guarantee
    224                  * that there will be at most one cache line for each address
    225                  * alias.
    226                  *
    227                  * This flush performs a cleanup after this address space. It is
    228                  * necessary because other address spaces that contain the same
    229                  * alias are not necessarily aware of the need to carry out the
    230                  * cache flush. The only address spaces that are aware of it are
    231                  * those that created the illegal alias.
    232                  */
    233                 dcache_flush();
    234         }
    235 #endif /* CONFIG_VIRT_IDX_DCACHE */
    236195}
    237196

  • kernel/arch/sparc64/src/mm/cache.c

    r9ab9c2ec rf8ddd17  
    3232/**
    3333 * @file
    34  * @brief       D-cache shootdown algorithm.
    3534 */
    3635
    3736#include <arch/mm/cache.h>
    3837
    39 #ifdef CONFIG_SMP
    40 
    41 #include <smp/ipi.h>
    42 #include <arch/interrupt.h>
    43 #include <synch/spinlock.h>
    44 #include <arch.h>
    45 #include <debug.h>
    46 
    47 /**
    48  * This spinlock is used by the processors to synchronize during the D-cache
    49  * shootdown.
    50  */
    51 SPINLOCK_INITIALIZE(dcachelock);
    52 
    53 /** Initialize the D-cache shootdown sequence.
    54  *
    55  * Start the shootdown sequence by sending out an IPI and wait until all
    56  * processors spin on the dcachelock spinlock.
    57  */
    58 void dcache_shootdown_start(void)
    59 {
    60         int i;
    61 
    62         CPU->arch.dcache_active = 0;
    63         spinlock_lock(&dcachelock);
    64 
    65         ipi_broadcast(IPI_DCACHE_SHOOTDOWN);   
    66 
    67 busy_wait:
    68         for (i = 0; i < config.cpu_count; i++)
    69                 if (cpus[i].arch.dcache_active)
    70                         goto busy_wait;
    71 }
    72 
    73 /** Finish the D-cache shootdown sequence. */
    74 void dcache_shootdown_finalize(void)
    75 {
    76         spinlock_unlock(&dcachelock);
    77         CPU->arch.dcache_active = 1;
    78 }
    79 
    80 /** Process the D-cache shootdown IPI. */
    81 void dcache_shootdown_ipi_recv(void)
    82 {
    83         ASSERT(CPU);
    84 
    85         CPU->arch.dcache_active = 0;
    86         spinlock_lock(&dcachelock);
    87         spinlock_unlock(&dcachelock);
    88        
    89         dcache_flush();
    90 
    91         CPU->arch.dcache_active = 1;
    92 }
    93 
    94 #endif /* CONFIG_SMP */
    95 
    9638/** @}
    9739 */

  • kernel/arch/sparc64/src/mm/page.c

    r9ab9c2ec rf8ddd17  
    7474                for (i = 0; i < bsp_locked_dtlb_entries; i++) {
    7575                        dtlb_insert_mapping(bsp_locked_dtlb_entry[i].virt_page,
    76                                 bsp_locked_dtlb_entry[i].phys_page, bsp_locked_dtlb_entry[i].pagesize_code,
    77                                 true, false);
     76                                bsp_locked_dtlb_entry[i].phys_page,
     77                                bsp_locked_dtlb_entry[i].pagesize_code, true,
     78                                false);
    7879                }
    7980#endif 
    … …  
    152153                 * Second, save the information about the mapping for APs.
    153154                 */
    154                 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page = virtaddr + i*sizemap[order].increment;
    155                 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page = physaddr + i*sizemap[order].increment;
    156                 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code = sizemap[order].pagesize_code;
     155                bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page =
     156                        virtaddr + i*sizemap[order].increment;
     157                bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page =
     158                        physaddr + i*sizemap[order].increment;
     159                bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code =
     160                        sizemap[order].pagesize_code;
    157161                bsp_locked_dtlb_entries++;
    158162#endif

  • kernel/arch/sparc64/src/smp/ipi.c

    r9ab9c2ec rf8ddd17  
    3939#include <config.h>
    4040#include <mm/tlb.h>
    41 #include <arch/mm/cache.h>
    4241#include <arch/interrupt.h>
    4342#include <arch/trap/interrupt.h>
    … …  
    122121                func = tlb_shootdown_ipi_recv;
    123122                break;
    124         case IPI_DCACHE_SHOOTDOWN:
    125                 func = dcache_shootdown_ipi_recv;
    126                 break;
    127123        default:
    128124                panic("Unknown IPI (%d).\n", ipi);

  • kernel/arch/sparc64/src/trap/interrupt.c

    r9ab9c2ec rf8ddd17  
    4545#include <arch.h>
    4646#include <mm/tlb.h>
    47 #include <arch/mm/cache.h>
    4847#include <config.h>
    4948#include <synch/spinlock.h>
    … …  
    9291                if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {
    9392                        tlb_shootdown_ipi_recv();
    94                 } else if (data0 == (uintptr_t) dcache_shootdown_ipi_recv) {
    95                         dcache_shootdown_ipi_recv();
    9693                }
    9794#endif
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