Changeset f47fd19 in mainline for kernel/arch/sparc64/include/mm

Timestamp:

2006-08-21T13:36:34Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a7961271

Parents:

ee289cf0

Message:

sparc64 work.
Define the istate structure.
Move the identity-mapping handler to assembly.
Make the preemptible handler more general so that TL=1 MMU exceptions can make use of it.

Little bit of formatting and indentation.

File:

• kernel/arch/sparc64/include/mm/tlb.h (modified) (5 diffs)

kernel/arch/sparc64/include/mm/tlb.h

@@ -67 +67 @@
 /* TLB Tag Access shifts */
 #define TLB_TAG_ACCESS_CONTEXT_SHIFT    0
+#define TLB_TAG_ACCESS_CONTEXT_MASK     ((1<<13)-1)
 #define TLB_TAG_ACCESS_VPN_SHIFT        13
 
@@ -108 +109 @@
         struct {
                 uint64_t vpn : 51;              /**< Virtual Address bits 63:13. */
-                unsigned context : 13;  /**< Context identifier. */
+                unsigned context : 13;          /**< Context identifier. */
         } __attribute__ ((packed));
 };
@@ -119 +120 @@
         uint64_t value;
         struct {
-                uint64_t vpn: 51;               /**< Virtual Address bits 63:13. */
+                uint64_t vpn: 51;       /**< Virtual Address bits 63:13. */
                 unsigned : 6;           /**< Ignored. */
                 unsigned type : 1;      /**< The type of demap operation. */
@@ -132 +133 @@
         uint64_t value;
         struct {
-                unsigned long : 39;     /**< Implementation dependent. */
-                unsigned nf : 1;        /**< Nonfaulting load. */
+                unsigned long : 40;     /**< Implementation dependent. */
                 unsigned asi : 8;       /**< ASI. */
-                unsigned tm : 1;        /**< TLB miss. */
-                unsigned : 1;
+                unsigned : 2;
                 unsigned ft : 7;        /**< Fault type. */
                 unsigned e : 1;         /**< Side-effect bit. */
@@ -426 +425 @@
 }
 
-extern void fast_instruction_access_mmu_miss(void);
-extern void fast_data_access_mmu_miss(void);
-extern void fast_data_access_protection(void);
+extern void fast_instruction_access_mmu_miss(int n, istate_t *istate);
+extern void fast_data_access_mmu_miss(int n, istate_t *istate);
+extern void fast_data_access_protection(int n, istate_t *istate);
 
 extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable);