Changeset ee06f2a in mainline for kernel/arch/ia32/src/drivers
- Timestamp:
- 2009-02-15T15:28:00Z (17 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 2d96f4d
- Parents:
- e7f2ad68
- Location:
- kernel/arch/ia32/src/drivers
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/src/drivers/i8254.c
re7f2ad68 ree06f2a 95 95 void i8254_normal_operation(void) 96 96 { 97 outb(CLK_PORT4, 0x36);97 pio_write_8(CLK_PORT4, 0x36); 98 98 pic_disable_irqs(1 << IRQ_CLK); 99 outb(CLK_PORT1, (CLK_CONST / HZ) & 0xf);100 outb(CLK_PORT1, (CLK_CONST / HZ) >> 8);99 pio_write_8(CLK_PORT1, (CLK_CONST / HZ) & 0xf); 100 pio_write_8(CLK_PORT1, (CLK_CONST / HZ) >> 8); 101 101 pic_enable_irqs(1 << IRQ_CLK); 102 102 } … … 115 115 * MAGIC_NUMBER is the magic value for 1ms. 116 116 */ 117 outb(CLK_PORT4, 0x30);118 outb(CLK_PORT1, 0xff);119 outb(CLK_PORT1, 0xff);117 pio_write_8(CLK_PORT4, 0x30); 118 pio_write_8(CLK_PORT1, 0xff); 119 pio_write_8(CLK_PORT1, 0xff); 120 120 121 121 do { 122 122 /* will read both status and count */ 123 outb(CLK_PORT4, 0xc2);124 not_ok = (uint8_t) (( inb(CLK_PORT1) >> 6) & 1);125 t1 = inb(CLK_PORT1);126 t1 |= inb(CLK_PORT1) << 8;123 pio_write_8(CLK_PORT4, 0xc2); 124 not_ok = (uint8_t) ((pio_read_8(CLK_PORT1) >> 6) & 1); 125 t1 = pio_read_8(CLK_PORT1); 126 t1 |= pio_read_8(CLK_PORT1) << 8; 127 127 } while (not_ok); 128 128 129 129 asm_delay_loop(LOOPS); 130 130 131 outb(CLK_PORT4, 0xd2);132 t2 = inb(CLK_PORT1);133 t2 |= inb(CLK_PORT1) << 8;131 pio_write_8(CLK_PORT4, 0xd2); 132 t2 = pio_read_8(CLK_PORT1); 133 t2 |= pio_read_8(CLK_PORT1) << 8; 134 134 135 135 /* 136 136 * We want to determine the overhead of the calibrating mechanism. 137 137 */ 138 outb(CLK_PORT4, 0xd2);139 o1 = inb(CLK_PORT1);140 o1 |= inb(CLK_PORT1) << 8;138 pio_write_8(CLK_PORT4, 0xd2); 139 o1 = pio_read_8(CLK_PORT1); 140 o1 |= pio_read_8(CLK_PORT1) << 8; 141 141 142 142 asm_fake_loop(LOOPS); 143 143 144 outb(CLK_PORT4, 0xd2);145 o2 = inb(CLK_PORT1);146 o2 |= inb(CLK_PORT1) << 8;144 pio_write_8(CLK_PORT4, 0xd2); 145 o2 = pio_read_8(CLK_PORT1); 146 o2 |= pio_read_8(CLK_PORT1) << 8; 147 147 148 148 CPU->delay_loop_const = -
kernel/arch/ia32/src/drivers/i8259.c
re7f2ad68 ree06f2a 50 50 { 51 51 /* ICW1: this is ICW1, ICW4 to follow */ 52 outb(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);52 pio_write_8(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4); 53 53 54 54 /* ICW2: IRQ 0 maps to INT IRQBASE */ 55 outb(PIC_PIC0PORT2, IVT_IRQBASE);55 pio_write_8(PIC_PIC0PORT2, IVT_IRQBASE); 56 56 57 57 /* ICW3: pic1 using IRQ IRQ_PIC1 */ 58 outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);58 pio_write_8(PIC_PIC0PORT2, 1 << IRQ_PIC1); 59 59 60 60 /* ICW4: i8086 mode */ 61 outb(PIC_PIC0PORT2, 1);61 pio_write_8(PIC_PIC0PORT2, 1); 62 62 63 63 /* ICW1: ICW1, ICW4 to follow */ 64 outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);64 pio_write_8(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4); 65 65 66 66 /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */ 67 outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);67 pio_write_8(PIC_PIC1PORT2, IVT_IRQBASE + 8); 68 68 69 69 /* ICW3: pic1 is known as IRQ_PIC1 */ 70 outb(PIC_PIC1PORT2, IRQ_PIC1);70 pio_write_8(PIC_PIC1PORT2, IRQ_PIC1); 71 71 72 72 /* ICW4: i8086 mode */ 73 outb(PIC_PIC1PORT2, 1);73 pio_write_8(PIC_PIC1PORT2, 1); 74 74 75 75 /* … … 95 95 96 96 if (irqmask & 0xff) { 97 x = inb(PIC_PIC0PORT2);98 outb(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));97 x = pio_read_8(PIC_PIC0PORT2); 98 pio_write_8(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff)))); 99 99 } 100 100 if (irqmask >> 8) { 101 x = inb(PIC_PIC1PORT2);102 outb(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));101 x = pio_read_8(PIC_PIC1PORT2); 102 pio_write_8(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8)))); 103 103 } 104 104 } … … 109 109 110 110 if (irqmask & 0xff) { 111 x = inb(PIC_PIC0PORT2);112 outb(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));111 x = pio_read_8(PIC_PIC0PORT2); 112 pio_write_8(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff))); 113 113 } 114 114 if (irqmask >> 8) { 115 x = inb(PIC_PIC1PORT2);116 outb(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));115 x = pio_read_8(PIC_PIC1PORT2); 116 pio_write_8(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8))); 117 117 } 118 118 } … … 120 120 void pic_eoi(void) 121 121 { 122 outb(0x20, 0x20);123 outb(0xa0, 0x20);122 pio_write_8(0x20, 0x20); 123 pio_write_8(0xa0, 0x20); 124 124 } 125 125
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