Changeset eb79d60 in mainline for kernel/arch/sparc64/include
- Timestamp:
- 2009-11-29T18:17:43Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- ba50a34
- Parents:
- 3f35634c
- Location:
- kernel/arch/sparc64/include
- Files:
-
- 3 added
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/include/cpu.h
r3f35634c reb79d60 64 64 #endif 65 65 66 typedef struct {67 uint32_t mid; /**< Processor ID as read from68 UPA_CONFIG/FIREPLANE_CONFIG. */69 ver_reg_t ver;70 uint32_t clock_frequency; /**< Processor frequency in Hz. */71 uint64_t next_tick_cmpr; /**< Next clock interrupt should be72 generated when the TICK register73 matches this value. */74 } cpu_arch_t;75 66 67 #if defined (SUN4U) 68 #include <arch/sun4u/cpu.h> 69 #elif defined (SUN4V) 70 #include <arch/sun4v/cpu.h> 71 #endif 76 72 77 /**78 * Reads the module ID (agent ID/CPUID) of the current CPU.79 */80 static inline uint32_t read_mid(void)81 {82 uint64_t icbus_config = asi_u64_read(ASI_ICBUS_CONFIG, 0);83 icbus_config = icbus_config >> ICBUS_CONFIG_MID_SHIFT;84 #if defined (US)85 return icbus_config & 0x1f;86 #elif defined (US3)87 if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIII_I)88 return icbus_config & 0x1f;89 else90 return icbus_config & 0x3ff;91 #endif92 }93 73 94 74 #endif -
kernel/arch/sparc64/include/sun4u/cpu.h
r3f35634c reb79d60 33 33 */ 34 34 35 #ifndef KERN_sparc64_ CPU_H_36 #define KERN_sparc64_ CPU_H_35 #ifndef KERN_sparc64_sun4u_CPU_H_ 36 #define KERN_sparc64_sun4u_CPU_H_ 37 37 38 38 #define MANUF_FUJITSU 0x04 -
kernel/arch/sparc64/include/sun4v/cpu.h
r3f35634c reb79d60 46 46 struct cpu; 47 47 48 /* 48 49 typedef struct { 49 50 uint64_t exec_unit_id; … … 54 55 SPINLOCK_DECLARE(proposed_nrdy_lock); 55 56 } exec_unit_t; 57 */ 56 58 57 // MH58 #if 059 59 typedef struct cpu_arch { 60 60 uint64_t id; /**< virtual processor ID */ … … 63 63 generated when the TICK register 64 64 matches this value. */ 65 exec_unit_t *exec_unit; /**< Physical core. */66 unsigned long proposed_nrdy; /**< Proposed No. of ready threads67 so that cores are equally balanced. */65 //exec_unit_t *exec_unit; /**< Physical core. */ 66 //unsigned long proposed_nrdy; /**< Proposed No. of ready threads 67 // so that cores are equally balanced. */ 68 68 } cpu_arch_t; 69 #endif70 69 71 70 #endif -
kernel/arch/sparc64/include/trap/regwin.h
r3f35634c reb79d60 131 131 132 132 /* 133 * Macro used to spill userspace window to userspace window buffer.134 * It can be either triggered from preemptible_handler doing SAVE135 * at (TL=1) or from normal kernel code doing SAVE when OTHERWIN>0136 * at (TL=0).137 */138 .macro SPILL_TO_USPACE_WINDOW_BUFFER139 stx %l0, [%g7 + L0_OFFSET]140 stx %l1, [%g7 + L1_OFFSET]141 stx %l2, [%g7 + L2_OFFSET]142 stx %l3, [%g7 + L3_OFFSET]143 stx %l4, [%g7 + L4_OFFSET]144 stx %l5, [%g7 + L5_OFFSET]145 stx %l6, [%g7 + L6_OFFSET]146 stx %l7, [%g7 + L7_OFFSET]147 stx %i0, [%g7 + I0_OFFSET]148 stx %i1, [%g7 + I1_OFFSET]149 stx %i2, [%g7 + I2_OFFSET]150 stx %i3, [%g7 + I3_OFFSET]151 stx %i4, [%g7 + I4_OFFSET]152 stx %i5, [%g7 + I5_OFFSET]153 stx %i6, [%g7 + I6_OFFSET]154 stx %i7, [%g7 + I7_OFFSET]155 add %g7, STACK_WINDOW_SAVE_AREA_SIZE, %g7156 saved157 retry158 .endm159 160 161 /*162 133 * Macro used by the nucleus and the primary context 0 during normal fills. 163 134 */ … … 232 203 #endif /* __ASM__ */ 233 204 205 #if defined (SUN4U) 206 #include <arch/trap/sun4u/regwin.h> 207 #elif defined (SUN4V) 208 #include <arch/trap/sun4v/regwin.h> 234 209 #endif 235 210 211 #endif 212 236 213 /** @} 237 214 */
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