Changeset eaf5e86 in mainline for uspace/drv/bus/usb/xhci/hw_struct

Timestamp:

2017-10-11T13:18:54Z (8 years ago)

Author:

Ondřej Hlavatý <aearsis@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

63adb18

Parents:

ac18b08

Message:

xhci: whitespace fixes

Location:

uspace/drv/bus/usb/xhci/hw_struct

Files:

• common.h (modified) (1 diff)
• context.h (modified) (2 diffs)
• regs.h (modified) (2 diffs)
• trb.h (modified) (1 diff)

uspace/drv/bus/usb/xhci/hw_struct/common.h

@@ -83 +83 @@
 static inline void xhci_qword_set_bits(xhci_qword_t *storage, uint64_t value, unsigned hi, unsigned lo)
 {
-   const uint64_t mask = host2xhci(64, BIT_RANGE(uint64_t, hi, lo));
-   const uint64_t set = host2xhci(64, value << lo);
-   *storage = (*storage & ~mask) | set;
+        const uint64_t mask = host2xhci(64, BIT_RANGE(uint64_t, hi, lo));
+        const uint64_t set = host2xhci(64, value << lo);
+        *storage = (*storage & ~mask) | set;
 }
 

uspace/drv/bus/usb/xhci/hw_struct/context.h

@@ -65 +65 @@
 
 #define XHCI_EP_TYPE_SET(ctx, val) \
-    xhci_dword_set_bits(&(ctx).data[1], val, 5, 3)
+        xhci_dword_set_bits(&(ctx).data[1], val, 5, 3)
 #define XHCI_EP_MAX_PACKET_SIZE_SET(ctx, val) \
-    xhci_dword_set_bits(&(ctx).data[1], val, 31, 16)
+        xhci_dword_set_bits(&(ctx).data[1], val, 31, 16)
 #define XHCI_EP_MAX_BURST_SIZE_SET(ctx, val) \
-    xhci_dword_set_bits(&(ctx).data[1], val, 15, 8)
+        xhci_dword_set_bits(&(ctx).data[1], val, 15, 8)
 #define XHCI_EP_TR_DPTR_SET(ctx, val) \
-    xhci_qword_set_bits(&(ctx).data2, (val >> 4), 63, 4)
+        xhci_qword_set_bits(&(ctx).data2, (val >> 4), 63, 4)
 #define XHCI_EP_DCS_SET(ctx, val) \
-    xhci_qword_set_bits(&(ctx).data2, val, 0, 0)
+        xhci_qword_set_bits(&(ctx).data2, val, 0, 0)
 #define XHCI_EP_INTERVAL_SET(ctx, val) \
-    xhci_dword_set_bits(&(ctx).data[0], val, 23, 16)
+        xhci_dword_set_bits(&(ctx).data[0], val, 23, 16)
 #define XHCI_EP_MAX_P_STREAMS_SET(ctx, val) \
-    xhci_dword_set_bits(&(ctx).data[0], val, 14, 10)
+        xhci_dword_set_bits(&(ctx).data[0], val, 14, 10)
 #define XHCI_EP_MULT_SET(ctx, val) \
-    xhci_dword_set_bits(&(ctx).data[0], val, 9, 8)
+        xhci_dword_set_bits(&(ctx).data[0], val, 9, 8)
 #define XHCI_EP_ERROR_COUNT_SET(ctx, val) \
-    xhci_dword_set_bits(&(ctx).data[1], val, 2, 1)
+        xhci_dword_set_bits(&(ctx).data[1], val, 2, 1)
 
 #define XHCI_EP_STATE(ctx)              XHCI_DWORD_EXTRACT((ctx).data[0],  2,  0)
@@ -108 +108 @@
 
 #define XHCI_SLOT_ROOT_HUB_PORT_SET(ctx, val) \
-    xhci_dword_set_bits(&(ctx).data[1], val, 23, 16)
+        xhci_dword_set_bits(&(ctx).data[1], val, 23, 16)
 #define XHCI_SLOT_CTX_ENTRIES_SET(ctx, val) \
-    xhci_dword_set_bits(&(ctx).data[0], val, 31, 27)
+        xhci_dword_set_bits(&(ctx).data[0], val, 31, 27)
 #define XHCI_SLOT_ROUTE_STRING_SET(ctx, val) \
         xhci_dword_set_bits(&(ctx).data[0], (val & 0xFFFFF), 19, 0)

uspace/drv/bus/usb/xhci/hw_struct/regs.h

@@ -499 +499 @@
  */
 typedef struct xhci_psi {
-        xhci_dword_t psi;
+        xhci_dword_t psi;
 } xhci_psi_t;
 
@@ -547 +547 @@
 
 static const xhci_sp_name_t xhci_name_usb = {
-    .str = "USB "
+        .str = "USB "
 };
 

uspace/drv/bus/usb/xhci/hw_struct/trb.h

@@ -170 +170 @@
 static inline void xhci_trb_copy(xhci_trb_t *dst, xhci_trb_t *src)
 {
-    /*
-     * As we do not know, whether our architecture is capable of copying 16
-     * bytes atomically, let's copy the fields one by one.
-     */
-    dst->parameter = src->parameter;
-    dst->status = src->status;
-    dst->control = src->control;
+        /*
+         * As we do not know, whether our architecture is capable of copying 16
+         * bytes atomically, let's copy the fields one by one.
+         */
+        dst->parameter = src->parameter;
+        dst->status = src->status;
+        dst->control = src->control;
 }