Changes in boot/arch/arm32/src/asm.S [ab63b04e:e93bb24] in mainline

File:

• boot/arch/arm32/src/asm.S (modified) (1 diff)

boot/arch/arm32/src/asm.S

@@ -56 +56 @@
 jump_to_kernel:
         #
-        # TODO
         # Make sure that the I-cache, D-cache and memory are mutually coherent
         # before passing control to the copied code.
         #
+
+        #
+        # r0 is kernel entry point
+        # r1 is pointer to the bootinfo structure
+
+#define CP15_C1_IC              12
+#define CP15_C1_BP              11
+#define CP15_C1_DC              2
+
+
+#ifndef PROCESSOR_ARCH_armv7_a
+        mrc     p15, 0, r4, c1, c0, 0
+        
+        # D-cache before the kernel is started.
+        bic     r4, r4, #(1 << CP15_C1_DC)
+
+        # Disable I-cache and Branche predictors.
+        bic     r4, r4, #(1 << CP15_C1_IC)
+        bic     r4, r4, #(1 << CP15_C1_BP)
+        
+        mcr     p15, 0, r4, c1, c0, 0
+#endif
+
+
+        
+        #Wait for the operations to complete
+#ifdef PROCESSOR_ARCH_armv7_a
+        dsb
+#else
+        #cp15 dsb, r4 is ignored (should be zero)
+        mov r4, #0
+        mcr p15, 0, r4, c7, c10, 4
+#endif
+        
+        # Clean ICache and BPredictors, r4 ignored (SBZ)
+        mov r4, #0
+        mcr p15, 0, r4, c7, c5, 0
+        nop
+
+        #Wait for the operations to complete
+#ifdef PROCESSOR_ARCH_armv7_a
+        isb
+        nop
+#else
+        # cp15 isb
+        mcr p15, 0, r4, c7, c5, 4
+        nop
+#endif
         mov pc, r0