- Timestamp:
- 2007-01-22T13:10:08Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 0f3fc9b
- Parents:
- 62c63fc
- Location:
- uspace/libc
- Files:
-
- 14 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/libc/arch/amd64/include/atomic.h
r62c63fc re7b7be3f 39 39 40 40 static inline void atomic_inc(atomic_t *val) { 41 __asm__volatile ("lock incq %0\n" : "=m" (val->count));41 asm volatile ("lock incq %0\n" : "=m" (val->count)); 42 42 } 43 43 44 44 static inline void atomic_dec(atomic_t *val) { 45 __asm__volatile ("lock decq %0\n" : "=m" (val->count));45 asm volatile ("lock decq %0\n" : "=m" (val->count)); 46 46 } 47 47 … … 50 50 long r; 51 51 52 __asm__volatile (52 asm volatile ( 53 53 "movq $1, %0\n" 54 54 "lock xaddq %0, %1\n" … … 63 63 long r; 64 64 65 __asm__volatile (65 asm volatile ( 66 66 "movq $-1, %0\n" 67 67 "lock xaddq %0, %1\n" -
uspace/libc/arch/amd64/include/thread.h
r62c63fc re7b7be3f 52 52 void * retval; 53 53 54 __asm__("movq %%fs:0, %0" : "=r"(retval));54 asm ("movq %%fs:0, %0" : "=r"(retval)); 55 55 return retval; 56 56 } -
uspace/libc/arch/ia32/include/atomic.h
r62c63fc re7b7be3f 37 37 38 38 static inline void atomic_inc(atomic_t *val) { 39 __asm__volatile ("lock incl %0\n" : "=m" (val->count));39 asm volatile ("lock incl %0\n" : "=m" (val->count)); 40 40 } 41 41 42 42 static inline void atomic_dec(atomic_t *val) { 43 __asm__volatile ("lock decl %0\n" : "=m" (val->count));43 asm volatile ("lock decl %0\n" : "=m" (val->count)); 44 44 } 45 45 … … 48 48 long r; 49 49 50 __asm__volatile (50 asm volatile ( 51 51 "movl $1, %0\n" 52 52 "lock xaddl %0, %1\n" … … 61 61 long r; 62 62 63 __asm__volatile (63 asm volatile ( 64 64 "movl $-1, %0\n" 65 65 "lock xaddl %0, %1\n" -
uspace/libc/arch/ia32/include/thread.h
r62c63fc re7b7be3f 52 52 void * retval; 53 53 54 __asm__("movl %%gs:0, %0" : "=r"(retval));54 asm ("movl %%gs:0, %0" : "=r"(retval)); 55 55 return retval; 56 56 } -
uspace/libc/arch/ia64/include/atomic.h
r62c63fc re7b7be3f 47 47 long v; 48 48 49 __asm__volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm));49 asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm)); 50 50 51 51 return v; -
uspace/libc/arch/ia64/include/thread.h
r62c63fc re7b7be3f 46 46 static inline void __tcb_set(tcb_t *tcb) 47 47 { 48 __asm__volatile ("mov r13 = %0\n" : : "r" (tcb) : "r13");48 asm volatile ("mov r13 = %0\n" : : "r" (tcb) : "r13"); 49 49 } 50 50 … … 53 53 void *retval; 54 54 55 __asm__volatile ("mov %0 = r13\n" : "=r" (retval));55 asm volatile ("mov %0 = r13\n" : "=r" (retval)); 56 56 57 57 return retval; -
uspace/libc/arch/mips32/include/atomic.h
r62c63fc re7b7be3f 57 57 long tmp, v; 58 58 59 __asm__volatile (59 asm volatile ( 60 60 "1:\n" 61 61 " ll %0, %1\n" -
uspace/libc/arch/mips32/include/thread.h
r62c63fc re7b7be3f 62 62 tp += MIPS_TP_OFFSET + sizeof(tcb_t); 63 63 64 __asm__volatile ("add $27, %0, $0" : : "r"(tp)); /* Move tls to K1 */64 asm volatile ("add $27, %0, $0" : : "r"(tp)); /* Move tls to K1 */ 65 65 } 66 66 … … 69 69 void * retval; 70 70 71 __asm__volatile("add %0, $27, $0" : "=r"(retval));71 asm volatile("add %0, $27, $0" : "=r"(retval)); 72 72 73 73 return (tcb_t *)(retval - MIPS_TP_OFFSET - sizeof(tcb_t)); -
uspace/libc/arch/ppc32/include/atomic.h
r62c63fc re7b7be3f 40 40 long tmp; 41 41 42 asm __volatile__(42 asm volatile ( 43 43 "1:\n" 44 44 "lwarx %0, 0, %2\n" … … 55 55 long tmp; 56 56 57 asm __volatile__(57 asm volatile ( 58 58 "1:\n" 59 59 "lwarx %0, 0, %2\n" -
uspace/libc/arch/ppc64/include/atomic.h
r62c63fc re7b7be3f 40 40 long tmp; 41 41 42 asm __volatile__(42 asm volatile ( 43 43 "1:\n" 44 44 "lwarx %0, 0, %2\n" … … 55 55 long tmp; 56 56 57 asm __volatile__(57 asm volatile ( 58 58 "1:\n" 59 59 "lwarx %0, 0, %2\n" -
uspace/libc/arch/sparc64/include/atomic.h
r62c63fc re7b7be3f 54 54 a = val->count; 55 55 b = a + i; 56 __asm__volatile ("casx %0, %2, %1\n" : "+m" (*val), "+r" (b) : "r" (a));56 asm volatile ("casx %0, %2, %1\n" : "+m" (*val), "+r" (b) : "r" (a)); 57 57 } while (a != b); 58 58 -
uspace/libc/arch/sparc64/include/syscall.h
r62c63fc re7b7be3f 47 47 register uint64_t a4 asm("o3") = p4; 48 48 49 __asm__volatile (49 asm volatile ( 50 50 "ta %5\n" 51 51 : "=r" (a1) -
uspace/libc/arch/sparc64/include/thread.h
r62c63fc re7b7be3f 46 46 static inline void __tcb_set(tcb_t *tcb) 47 47 { 48 __asm__volatile ("mov %0, %%g7\n" : : "r" (tcb) : "g7");48 asm volatile ("mov %0, %%g7\n" : : "r" (tcb) : "g7"); 49 49 } 50 50 … … 53 53 void *retval; 54 54 55 __asm__volatile ("mov %%g7, %0\n" : "=r" (retval));55 asm volatile ("mov %%g7, %0\n" : "=r" (retval)); 56 56 57 57 return retval; -
uspace/libc/malloc/malloc.c
r62c63fc re7b7be3f 1570 1570 else {\ 1571 1571 unsigned int K;\ 1572 __asm__("bsrl %1,%0\n\t" : "=r" (K) : "rm" (X));\1572 asm("bsrl %1,%0\n\t" : "=r" (K) : "rm" (X));\ 1573 1573 I = (bindex_t)((K << 1) + ((S >> (K + (TREEBIN_SHIFT-1)) & 1)));\ 1574 1574 }\ … … 1629 1629 {\ 1630 1630 unsigned int J;\ 1631 __asm__("bsfl %1,%0\n\t" : "=r" (J) : "rm" (X));\1631 asm("bsfl %1,%0\n\t" : "=r" (J) : "rm" (X));\ 1632 1632 I = (bindex_t)J;\ 1633 1633 }
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