Changeset e7b7be3f in mainline for kernel/arch/mips32/include

Timestamp:

2007-01-22T13:10:08Z (19 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0f3fc9b

Parents:

62c63fc

Message:

asm volatile → asm volatile

Location:

kernel/arch/mips32/include

Files:

• asm.h (modified) (2 diffs)
• atomic.h (modified) (1 diff)
• barrier.h (modified) (1 diff)
• mm/tlb.h (modified) (4 diffs)

kernel/arch/mips32/include/asm.h

@@ -44 +44 @@
 {
         /* Most of the simulators do not support */
-/*      __asm__ volatile ("wait"); */
+/*      asm volatile ("wait"); */
 }
 
@@ -57 +57 @@
         uintptr_t v;
         
-        __asm__ volatile ("and %0, $29, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
+        asm volatile ("and %0, $29, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
         
         return v;

kernel/arch/mips32/include/atomic.h

@@ -56 +56 @@
         long tmp, v;
 
-        __asm__ volatile (
+        asm volatile (
                 "1:\n"
                 "       ll %0, %1\n"

kernel/arch/mips32/include/barrier.h

@@ -39 +39 @@
  * TODO: implement true MIPS memory barriers for macros below.
  */
-#define CS_ENTER_BARRIER()      __asm__ volatile ("" ::: "memory")
-#define CS_LEAVE_BARRIER()      __asm__ volatile ("" ::: "memory")
+#define CS_ENTER_BARRIER()      asm volatile ("" ::: "memory")
+#define CS_LEAVE_BARRIER()      asm volatile ("" ::: "memory")
 
-#define memory_barrier()        __asm__ volatile ("" ::: "memory")
-#define read_barrier()          __asm__ volatile ("" ::: "memory")
-#define write_barrier()         __asm__ volatile ("" ::: "memory")
+#define memory_barrier()        asm volatile ("" ::: "memory")
+#define read_barrier()          asm volatile ("" ::: "memory")
+#define write_barrier()         asm volatile ("" ::: "memory")
 
 #endif

kernel/arch/mips32/include/mm/tlb.h

@@ -143 +143 @@
 static inline void tlbp(void)
 {
-        __asm__ volatile ("tlbp\n\t");
+        asm volatile ("tlbp\n\t");
 }
 
@@ -153 +153 @@
 static inline void tlbr(void)
 {
-        __asm__ volatile ("tlbr\n\t");
+        asm volatile ("tlbr\n\t");
 }
 
@@ -162 +162 @@
 static inline void tlbwi(void)
 {
-        __asm__ volatile ("tlbwi\n\t");
+        asm volatile ("tlbwi\n\t");
 }
 
@@ -171 +171 @@
 static inline void tlbwr(void)
 {
-        __asm__ volatile ("tlbwr\n\t");
+        asm volatile ("tlbwr\n\t");
 }