Changeset e7b7be3f in mainline for kernel/arch/amd64/src

Timestamp:

2007-01-22T13:10:08Z (19 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0f3fc9b

Parents:

62c63fc

Message:

asm volatile → asm volatile

Location:

kernel/arch/amd64/src

Files:

• cpu/cpu.c (modified) (3 diffs)
• fpu_context.c (modified) (3 diffs)
• userspace.c (modified) (1 diff)

kernel/arch/amd64/src/cpu/cpu.c

@@ -77 +77 @@
 void cpu_setup_fpu(void)
 {
-        __asm__ volatile (
+        asm volatile (
                 "movq %%cr0, %%rax;"
                 "btsq $1, %%rax;" /* cr0.mp */
@@ -100 +100 @@
 void fpu_disable(void)
 {
-        __asm__ volatile (
+        asm     volatile (
                 "mov %%cr0,%%rax;"
                 "bts $3,%%rax;"
@@ -112 +112 @@
 void fpu_enable(void)
 {
-        __asm__ volatile (
+        asm     volatile (
                 "mov %%cr0,%%rax;"
                 "btr $3,%%rax;"

kernel/arch/amd64/src/fpu_context.c

@@ -41 +41 @@
 void fpu_context_save(fpu_context_t *fctx)
 {
-        __asm__ volatile (
+        asm volatile (
                 "fxsave %0"
                 : "=m"(*fctx)
@@ -50 +50 @@
 void fpu_context_restore(fpu_context_t *fctx)
 {
-        __asm__ volatile (
+        asm volatile (
                 "fxrstor %0"
                 : "=m"(*fctx)
@@ -59 +59 @@
 {
         /* TODO: Zero all SSE, MMX etc. registers */
-        __asm__ volatile (
+        asm volatile (
                 "fninit;"
         );

kernel/arch/amd64/src/userspace.c

@@ -55 +55 @@
         ipl &= ~(0xcd4);
 
-        __asm__ volatile (""
+        asm volatile (""
                           "pushq %0\n"
                           "pushq %1\n"