Changeset e6b9182 in mainline for uspace/drv/bus/usb/ohci
- Timestamp:
- 2017-10-13T08:49:29Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 741bcdeb
- Parents:
- 0a5833d7
- Location:
- uspace/drv/bus/usb/ohci
- Files:
-
- 8 edited
- 2 moved
-
Makefile (modified) (1 diff)
-
endpoint_list.h (modified) (1 diff)
-
hc.c (modified) (2 diffs)
-
hc.h (modified) (2 diffs)
-
hw_struct/endpoint_descriptor.c (modified) (1 diff)
-
main.c (modified) (6 diffs)
-
ohci_batch.c (modified) (1 diff)
-
ohci_bus.c (moved) (moved from uspace/drv/bus/usb/ohci/ohci_endpoint.c ) (6 diffs)
-
ohci_bus.h (moved) (moved from uspace/drv/bus/usb/ohci/ohci_endpoint.h ) (5 diffs)
-
ohci_rh.c (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/ohci/Makefile
r0a5833d7 re6b9182 49 49 main.c \ 50 50 ohci_batch.c \ 51 ohci_ endpoint.c \51 ohci_bus.c \ 52 52 ohci_rh.c \ 53 53 hw_struct/endpoint_descriptor.c \ -
uspace/drv/bus/usb/ohci/endpoint_list.h
r0a5833d7 re6b9182 41 41 #include <usb/host/utils/malloc32.h> 42 42 43 #include "ohci_ endpoint.h"43 #include "ohci_bus.h" 44 44 #include "hw_struct/endpoint_descriptor.h" 45 45 -
uspace/drv/bus/usb/ohci/hc.c
r0a5833d7 re6b9182 47 47 #include <usb/usb.h> 48 48 49 #include "ohci_ endpoint.h"49 #include "ohci_bus.h" 50 50 #include "ohci_batch.h" 51 51 … … 287 287 288 288 /* Check for root hub communication */ 289 if (batch->ep-> address == ohci_rh_get_address(&instance->rh)) {289 if (batch->ep->target.address == ohci_rh_get_address(&instance->rh)) { 290 290 usb_log_debug("OHCI root hub request.\n"); 291 291 return ohci_rh_schedule(&instance->rh, batch); -
uspace/drv/bus/usb/ohci/hc.h
r0a5833d7 re6b9182 52 52 #include "ohci_regs.h" 53 53 #include "ohci_rh.h" 54 #include "ohci_bus.h" 54 55 #include "endpoint_list.h" 55 56 #include "hw_struct/hcca.h" … … 80 81 /** USB hub emulation structure */ 81 82 ohci_rh_t rh; 83 84 /** USB bookkeeping */ 85 ohci_bus_t bus; 82 86 } hc_t; 83 87 -
uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.c
r0a5833d7 re6b9182 79 79 /* Status: address, endpoint nr, direction mask and max packet size. */ 80 80 OHCI_MEM32_WR(instance->status, 81 ((ep-> address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT)82 | ((ep-> endpoint & ED_STATUS_EN_MASK) << ED_STATUS_EN_SHIFT)81 ((ep->target.address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT) 82 | ((ep->target.endpoint & ED_STATUS_EN_MASK) << ED_STATUS_EN_SHIFT) 83 83 | ((dir[ep->direction] & ED_STATUS_D_MASK) << ED_STATUS_D_SHIFT) 84 84 | ((ep->max_packet_size & ED_STATUS_MPS_MASK) -
uspace/drv/bus/usb/ohci/main.c
r0a5833d7 re6b9182 45 45 46 46 #include "hc.h" 47 #include "ohci_bus.h" 47 48 48 49 #define NAME "ohci" … … 53 54 54 55 static const ddf_hc_driver_t ohci_hc_driver = { 55 .hc_speed = USB_SPEED_FULL,56 56 .irq_code_gen = ohci_hc_gen_irq_code, 57 57 .init = ohci_driver_init, … … 62 62 .ops = { 63 63 .schedule = ohci_hc_schedule, 64 .ep_add_hook = ohci_endpoint_init,65 .ep_remove_hook = ohci_endpoint_fini,66 64 .irq_hook = ohci_hc_interrupt, 67 65 .status_hook = ohci_hc_status, … … 72 70 static int ohci_driver_init(hcd_t *hcd, const hw_res_list_parsed_t *res) 73 71 { 72 int err; 73 74 74 assert(hcd); 75 75 assert(hcd_get_driver_data(hcd) == NULL); … … 79 79 return ENOMEM; 80 80 81 const int ret = hc_init(instance, res); 82 if (ret == EOK) { 83 hcd_set_implementation(hcd, instance, &ohci_hc_driver.ops); 84 } else { 85 free(instance); 86 } 87 return ret; 81 if ((err = hc_init(instance, res)) != EOK) 82 goto err; 83 84 if ((err = ohci_bus_init(&instance->bus, instance))) 85 goto err; 86 87 hcd_set_implementation(hcd, instance, &ohci_hc_driver.ops, &instance->bus.base.base); 88 89 return EOK; 90 91 err: 92 free(instance); 93 return err; 88 94 } 89 95 … … 115 121 hc_fini(hc); 116 122 117 hcd_set_implementation(hcd, NULL, NULL );123 hcd_set_implementation(hcd, NULL, NULL, NULL); 118 124 free(hc); 119 125 } -
uspace/drv/bus/usb/ohci/ohci_batch.c
r0a5833d7 re6b9182 45 45 46 46 #include "ohci_batch.h" 47 #include "ohci_ endpoint.h"47 #include "ohci_bus.h" 48 48 49 49 static void (*const batch_setup[])(ohci_transfer_batch_t*, usb_direction_t); -
uspace/drv/bus/usb/ohci/ohci_bus.c
r0a5833d7 re6b9182 37 37 #include <stdlib.h> 38 38 #include <usb/host/utils/malloc32.h> 39 #include <usb/host/bandwidth.h> 39 40 40 #include "ohci_ endpoint.h"41 #include "ohci_bus.h" 41 42 #include "hc.h" 42 43 … … 46 47 * @param[in] toggle new value of toggle bit 47 48 */ 48 static void ohci_ep_toggle_set( void *ohci_ep, inttoggle)49 static void ohci_ep_toggle_set(endpoint_t *ep, bool toggle) 49 50 { 50 ohci_endpoint_t *instance = ohci_e p;51 ohci_endpoint_t *instance = ohci_endpoint_get(ep); 51 52 assert(instance); 52 53 assert(instance->ed); 54 ep->toggle = toggle; 53 55 ed_toggle_set(instance->ed, toggle); 54 56 } … … 59 61 * @return Current value of toggle bit. 60 62 */ 61 static int ohci_ep_toggle_get(void *ohci_ep)63 static bool ohci_ep_toggle_get(endpoint_t *ep) 62 64 { 63 ohci_endpoint_t *instance = ohci_e p;65 ohci_endpoint_t *instance = ohci_endpoint_get(ep); 64 66 assert(instance); 65 67 assert(instance->ed); … … 68 70 69 71 /** Creates new hcd endpoint representation. 70 *71 * @param[in] ep USBD endpoint structure72 * @return Error code.73 72 */ 74 int ohci_endpoint_init(hcd_t *hcd, endpoint_t *ep)73 static endpoint_t *ohci_endpoint_create(bus_t *bus) 75 74 { 76 assert(ep); 75 assert(bus); 76 77 77 ohci_endpoint_t *ohci_ep = malloc(sizeof(ohci_endpoint_t)); 78 78 if (ohci_ep == NULL) 79 return ENOMEM;79 return NULL; 80 80 81 81 ohci_ep->ed = malloc32(sizeof(ed_t)); 82 82 if (ohci_ep->ed == NULL) { 83 83 free(ohci_ep); 84 return ENOMEM;84 return NULL; 85 85 } 86 86 … … 89 89 free32(ohci_ep->ed); 90 90 free(ohci_ep); 91 return ENOMEM;91 return NULL; 92 92 } 93 93 94 94 link_initialize(&ohci_ep->link); 95 ed_init(ohci_ep->ed, ep, ohci_ep->td);96 endpoint_set_hc_data(97 ep, ohci_ep, ohci_ep_toggle_get, ohci_ep_toggle_set);98 hc_enqueue_endpoint(hcd_get_driver_data(hcd), ep);99 95 return EOK; 100 96 } … … 105 101 * @param[in] ep endpoint structure. 106 102 */ 107 void ohci_endpoint_fini(hcd_t *hcd,endpoint_t *ep)103 static void ohci_endpoint_destroy(endpoint_t *ep) 108 104 { 109 assert(hcd);110 105 assert(ep); 111 106 ohci_endpoint_t *instance = ohci_endpoint_get(ep); 112 hc_dequeue_endpoint(hcd_get_driver_data(hcd), ep); 113 endpoint_clear_hc_data(ep); 114 if (instance) { 115 free32(instance->ed); 116 free32(instance->td); 117 free(instance); 118 } 107 108 free32(instance->ed); 109 free32(instance->td); 110 free(instance); 111 } 112 113 114 static int ohci_register_ep(bus_t *bus_base, endpoint_t *ep) 115 { 116 ohci_bus_t *bus = (ohci_bus_t *) bus_base; 117 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep); 118 119 const int err = bus->parent_ops.register_endpoint(bus_base, ep); 120 if (err) 121 return err; 122 123 ed_init(ohci_ep->ed, ep, ohci_ep->td); 124 hc_enqueue_endpoint(bus->hc, ep); 125 126 return EOK; 127 } 128 129 static int ohci_release_ep(bus_t *bus_base, endpoint_t *ep) 130 { 131 ohci_bus_t *bus = (ohci_bus_t *) bus_base; 132 assert(bus); 133 assert(ep); 134 135 const int err = bus->parent_ops.release_endpoint(bus_base, ep); 136 if (err) 137 return err; 138 139 hc_dequeue_endpoint(bus->hc, ep); 140 return EOK; 141 142 } 143 144 int ohci_bus_init(ohci_bus_t *bus, hc_t *hc) 145 { 146 assert(hc); 147 assert(bus); 148 149 usb2_bus_init(&bus->base, BANDWIDTH_AVAILABLE_USB11, bandwidth_count_usb11); 150 151 bus_ops_t *ops = &bus->base.base.ops; 152 bus->parent_ops = *ops; 153 ops->create_endpoint = ohci_endpoint_create; 154 ops->destroy_endpoint = ohci_endpoint_destroy; 155 ops->endpoint_set_toggle = ohci_ep_toggle_set; 156 ops->endpoint_get_toggle = ohci_ep_toggle_get; 157 158 ops->register_endpoint = ohci_register_ep; 159 ops->release_endpoint = ohci_release_ep; 160 161 return EOK; 119 162 } 120 163 -
uspace/drv/bus/usb/ohci/ohci_bus.h
r0a5833d7 re6b9182 1 1 /* 2 2 * Copyright (c) 2011 Jan Vesely 3 * Copyright (c) 2017 Ondrej Hlavaty <aearsis@eideo.cz> 3 4 * All rights reserved. 4 5 * … … 32 33 * @brief OHCI driver 33 34 */ 34 #ifndef DRV_OHCI_HCD_ ENDPOINT_H35 #define DRV_OHCI_HCD_ ENDPOINT_H35 #ifndef DRV_OHCI_HCD_BUS_H 36 #define DRV_OHCI_HCD_BUS_H 36 37 37 38 #include <assert.h> 38 39 #include <adt/list.h> 39 #include <usb/host/endpoint.h> 40 #include <usb/host/hcd.h> 40 #include <usb/host/usb2_bus.h> 41 41 42 42 #include "hw_struct/endpoint_descriptor.h" … … 45 45 /** Connector structure linking ED to to prepared TD. */ 46 46 typedef struct ohci_endpoint { 47 endpoint_t base; 48 47 49 /** OHCI endpoint descriptor */ 48 50 ed_t *ed; … … 53 55 } ohci_endpoint_t; 54 56 55 int ohci_endpoint_init(hcd_t *hcd, endpoint_t *ep); 56 void ohci_endpoint_fini(hcd_t *hcd, endpoint_t *ep); 57 typedef struct hc hc_t; 58 59 typedef struct { 60 usb2_bus_t base; 61 hc_t *hc; 62 63 /* Stored original ops from base, they are called in our handlers */ 64 bus_ops_t parent_ops; 65 } ohci_bus_t; 66 67 int ohci_bus_init(ohci_bus_t *, hc_t *); 57 68 58 69 /** Get and convert assigned ohci_endpoint_t structure … … 63 74 { 64 75 assert(ep); 65 return ep->hc_data.data;76 return (ohci_endpoint_t *) ep; 66 77 } 67 78 -
uspace/drv/bus/usb/ohci/ohci_rh.c
r0a5833d7 re6b9182 178 178 assert(instance); 179 179 assert(batch); 180 const usb_target_t target = {{ 181 .address = batch->ep->address, 182 .endpoint = batch->ep->endpoint, 183 }}; 180 const usb_target_t target = batch->ep->target; 184 181 batch->error = virthub_base_request(&instance->base, target, 185 182 usb_transfer_batch_direction(batch), (void*)batch->setup_buffer, … … 211 208 instance->unfinished_interrupt_transfer = NULL; 212 209 if (batch) { 213 const usb_target_t target = {{ 214 .address = batch->ep->address, 215 .endpoint = batch->ep->endpoint, 216 }}; 210 const usb_target_t target = batch->ep->target; 217 211 batch->error = virthub_base_request(&instance->base, target, 218 212 usb_transfer_batch_direction(batch),
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