Changeset e386cbf in mainline for kernel/arch/sparc64/src/sparc64.c


Ignore:
Timestamp:
2006-08-01T15:58:32Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e12ccc5
Parents:
b3e8c90
Message:

sparc64 work.
Dump take_over_tlb_and_tt() and add its assembly language replacement.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/src/sparc64.c

    rb3e8c90 re386cbf  
    9292}
    9393
    94 /** Take over TLB and trap table.
    95  *
    96  * Initialize ITLB and DTLB and switch to kernel
    97  * trap table.
    98  *
    99  * First, demap context 0 and install the
    100  * global 4M locked kernel mapping.
    101  *
    102  * Second, prepare a temporary IMMU mapping in
    103  * context 1, switch to it, demap context 0,
    104  * install the global 4M locked kernel mapping
    105  * in context 0 and switch back to context 0.
    106  *
    107  * @param base Base address that will be hardwired in both TLBs.
    108  */
    109 void take_over_tlb_and_tt(uintptr_t base)
    110 {
    111         tlb_tag_access_reg_t tag;
    112         tlb_data_t data;
    113         frame_address_t fr;
    114         page_address_t pg;
    115 
    116         /*
    117          * Switch to the kernel trap table.
    118          */
    119         trap_switch_trap_table();
    120 
    121         fr.address = base;
    122         pg.address = base;
    123 
    124         /*
    125          * We do identity mapping of 4M-page at 4M.
    126          */
    127         tag.value = 0;
    128         tag.context = 0;
    129         tag.vpn = pg.vpn;
    130 
    131         data.value = 0;
    132         data.v = true;
    133         data.size = PAGESIZE_4M;
    134         data.pfn = fr.pfn;
    135         data.l = true;
    136         data.cp = 1;
    137         data.cv = 0;
    138         data.p = true;
    139         data.w = true;
    140         data.g = true;
    141 
    142         /*
    143          * Straightforwardly demap DMUU context 0,
    144          * and replace it with the locked kernel mapping.
    145          */
    146         dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
    147         dtlb_tag_access_write(tag.value);
    148         dtlb_data_in_write(data.value);
    149 
    150         /*
    151          * Install kernel code mapping in context 1
    152          * and switch to it.
    153          */
    154         tag.context = 1;
    155         data.g = false;
    156         itlb_tag_access_write(tag.value);
    157         itlb_data_in_write(data.value);
    158         mmu_primary_context_write(1);
    159        
    160         /*
    161          * Demap old context 0.
    162          */
    163         itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
    164        
    165         /*
    166          * Install the locked kernel mapping in context 0
    167          * and switch to it.
    168          */
    169         tag.context = 0;
    170         data.g = true;
    171         itlb_tag_access_write(tag.value);
    172         itlb_data_in_write(data.value);
    173         mmu_primary_context_write(0);
    174 }
    175 
    17694/** @}
    17795 */
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