Changeset e2cc9a0 in mainline for kernel/arch/sparc64/include

Timestamp:

2006-10-06T22:37:15Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

33b1903

Parents:

233af8c5

Message:

Add support for interrupt mapping in the Sabre PCI controller.
Add support for PCI and EBUS interrupt mapping via the OpenFirmware device tree.
Unfortunatelly, the code is not capable enough to earn single ns16550 interrupt.
I suspect something needs to be enabled in the EBUS registers.

Location:

kernel/arch/sparc64/include

Files:

• asm.h (modified) (2 diffs)
• drivers/ns16550.h (modified) (2 diffs)
• drivers/pci.h (added)
• trap/interrupt.h (modified) (1 diff)

kernel/arch/sparc64/include/asm.h

@@ -325 +325 @@
         uint64_t v;
         
-        __asm__ volatile ("ldxa [%1] %2, %0\n" : "=r" (v) : "r" (va), "i" (asi));
+        __asm__ volatile ("ldxa [%1] %2, %0\n" : "=r" (v) : "r" (va), "i" ((unsigned) asi));
         
         return v;
@@ -338 +338 @@
 static inline void asi_u64_write(asi_t asi, uintptr_t va, uint64_t v)
 {
-        __asm__ volatile ("stxa %0, [%1] %2\n" : :  "r" (v), "r" (va), "i" (asi) : "memory");
+        __asm__ volatile ("stxa %0, [%1] %2\n" : :  "r" (v), "r" (va), "i" ((unsigned) asi) : "memory");
 }
 

kernel/arch/sparc64/include/drivers/ns16550.h

@@ -39 +39 @@
 #include <arch/drivers/kbd.h>
 
+/* NS16550 registers */
 #define RBR_REG         0       /** Receiver Buffer Register. */
 #define IER_REG         1       /** Interrupt Enable Register. */
+#define IIR_REG         2       /** Interrupt Ident Register (read). */
+#define FCR_REG         2       /** FIFO control register (write). */
+#define LCR_REG         3       /** Line Control register. */
 #define LSR_REG         5       /** Line Status Register. */
+
+#define IER_ERBFI       0x01    /** Enable Receive Buffer Full Interrupt. */
+
+#define LCR_DLAB        0x80    /** Divisor Latch Access bit. */
 
 static inline uint8_t ns16550_rbr_read(void)
@@ -58 +66 @@
 }
 
+static inline uint8_t ns16550_iir_read(void)
+{
+        return kbd_virt_address[IIR_REG];
+}
+
+static inline void ns16550_fcr_write(uint8_t v)
+{
+        kbd_virt_address[FCR_REG] = v;
+}
+
+static inline uint8_t ns16550_lcr_read(void)
+{
+        return kbd_virt_address[LCR_REG];
+}
+
+static inline void ns16550_lcr_write(uint8_t v)
+{
+        kbd_virt_address[LCR_REG] = v;
+}
+
 static inline uint8_t ns16550_lsr_read(void)
 {

kernel/arch/sparc64/include/trap/interrupt.h

@@ -40 +40 @@
 #include <arch/trap/trap_table.h>
 #include <arch/stack.h>
+
+/* IMAP register bits */
+#define IGN_MASK        0x7c0
+#define INO_MASK        0x1f
+#define IMAP_V_MASK     (1ULL<<31)
+
+#define IGN_SHIFT       6
+
 
 /* Interrupt ASI registers. */