Changeset e25eca80 in mainline for kernel/arch/sparc64/include
- Timestamp:
- 2008-06-13T20:36:38Z (17 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- d5087aa
- Parents:
- 80dabb8d
- Location:
- kernel/arch/sparc64/include
- Files:
-
- 1 added
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/include/barrier.h
r80dabb8d re25eca80 58 58 asm volatile ("membar #StoreStore\n" ::: "memory") 59 59 60 static inline void flush(uintptr_t addr) 61 { 62 asm volatile ("flush %0\n" :: "r" (addr) : "memory"); 63 } 64 60 65 /** Flush Instruction Memory instruction. */ 61 static inline void flush (void)66 static inline void flush_blind(void) 62 67 { 63 68 /* … … 80 85 } 81 86 87 #define smc_coherence(a) \ 88 { \ 89 write_barrier(); \ 90 flush((a)); \ 91 } 92 82 93 #endif 83 94 -
kernel/arch/sparc64/include/mm/tlb.h
r80dabb8d re25eca80 161 161 { 162 162 asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v); 163 flush ();163 flush_blind(); 164 164 } 165 165 … … 180 180 { 181 181 asi_u64_write(ASI_DMMU, VA_SECONDARY_CONTEXT_REG, v); 182 flush ();182 flush_blind(); 183 183 } 184 184 … … 210 210 reg.tlb_entry = entry; 211 211 asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value); 212 flush ();212 flush_blind(); 213 213 } 214 214 … … 280 280 { 281 281 asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v); 282 flush ();282 flush_blind(); 283 283 } 284 284 … … 319 319 { 320 320 asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v); 321 flush ();321 flush_blind(); 322 322 } 323 323 … … 348 348 { 349 349 asi_u64_write(ASI_IMMU, VA_IMMU_SFSR, v); 350 flush ();350 flush_blind(); 351 351 } 352 352 … … 401 401 * address within the 402 402 * ASI */ 403 flush ();403 flush_blind(); 404 404 } 405 405
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