Changeset df7f5cea in mainline for kernel/arch/ppc32/include

Timestamp:

2014-08-25T23:03:50Z (11 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

1c635d6, 3ab2d1e

Parents:

6dbe7f68

Message:

Experimental support for hard-floats on ppc32.

• By default disabled.

Location:

kernel/arch/ppc32/include/arch

Files:

• context_offset.h (modified) (1 diff)
• fpu_context.h (modified) (2 diffs)
• interrupt.h (modified) (1 diff)
• msr.h (modified) (1 diff)

kernel/arch/ppc32/include/arch/context_offset.h

@@ -54 +54 @@
 #define OFFSET_CR    0x58
 
-#define OFFSET_FR14  0x0
-#define OFFSET_FR15  0x8
-#define OFFSET_FR16  0x10
-#define OFFSET_FR17  0x18
-#define OFFSET_FR18  0x20
-#define OFFSET_FR19  0x28
-#define OFFSET_FR20  0x30
-#define OFFSET_FR21  0x38
-#define OFFSET_FR22  0x40
-#define OFFSET_FR23  0x48
-#define OFFSET_FR24  0x50
-#define OFFSET_FR25  0x58
-#define OFFSET_FR26  0x60
-#define OFFSET_FR27  0x68
-#define OFFSET_FR28  0x70
-#define OFFSET_FR29  0x78
-#define OFFSET_FR30  0x80
-#define OFFSET_FR31  0x88
-#define OFFSET_FPSCR 0x90
+#define OFFSET_FR0  0x0
+#define OFFSET_FR1  0x8
+#define OFFSET_FR2  0x10
+#define OFFSET_FR3  0x18
+#define OFFSET_FR4  0x20
+#define OFFSET_FR5  0x28
+#define OFFSET_FR6  0x30
+#define OFFSET_FR7  0x38
+#define OFFSET_FR8  0x40
+#define OFFSET_FR9  0x48
+#define OFFSET_FR10  0x50
+#define OFFSET_FR11  0x58
+#define OFFSET_FR12  0x60
+#define OFFSET_FR13  0x68
+#define OFFSET_FR14  0x70
+#define OFFSET_FR15  0x78
+#define OFFSET_FR16  0x80
+#define OFFSET_FR17  0x88
+#define OFFSET_FR18  0x90
+#define OFFSET_FR19  0x98
+#define OFFSET_FR20  0xa0
+#define OFFSET_FR21  0xa8
+#define OFFSET_FR22  0xb0
+#define OFFSET_FR23  0xb8
+#define OFFSET_FR24  0xc0
+#define OFFSET_FR25  0xc8
+#define OFFSET_FR26  0xd0
+#define OFFSET_FR27  0xd8
+#define OFFSET_FR28  0xe0
+#define OFFSET_FR29  0xe8
+#define OFFSET_FR30  0xf0
+#define OFFSET_FR31  0xf8
+#define OFFSET_FPSCR 0x100
 
 #ifdef __ASM__

kernel/arch/ppc32/include/arch/fpu_context.h

@@ -36 +36 @@
 #define KERN_ppc32_FPU_CONTEXT_H_
 
+#define FPU_CONTEXT_ALIGN       8       
+
 #include <typedefs.h>
 
 typedef struct {
+        uint64_t fr0;
+        uint64_t fr1;
+        uint64_t fr2;
+        uint64_t fr3;
+        uint64_t fr4;
+        uint64_t fr5;
+        uint64_t fr6;
+        uint64_t fr7;
+        uint64_t fr8;
+        uint64_t fr9;
+        uint64_t fr10;
+        uint64_t fr11;
+        uint64_t fr12;
+        uint64_t fr13;
         uint64_t fr14;
         uint64_t fr15;
@@ -57 +73 @@
         uint64_t fr30;
         uint64_t fr31;
-        uint32_t fpscr;
+        uint64_t fpscr;
 } __attribute__ ((packed)) fpu_context_t;
 

kernel/arch/ppc32/include/arch/interrupt.h

@@ -44 +44 @@
 #define VECTOR_INSTRUCTION_STORAGE  3
 #define VECTOR_EXTERNAL             4
+#define VECTOR_FP_UNAVAILABLE       7
 #define VECTOR_DECREMENTER          8
 #define VECTOR_ITLB_MISS            13

kernel/arch/ppc32/include/arch/msr.h

@@ -39 +39 @@
 #define MSR_DR  (1 << 4)
 #define MSR_IR  (1 << 5)
+#define MSR_FE1 (1 << 8)
+#define MSR_FE0 (1 << 11)
+#define MSR_FP  (1 << 13)
 #define MSR_PR  (1 << 14)
 #define MSR_EE  (1 << 15)