Changeset df3c6f02 in mainline for kernel/arch/ia64


Ignore:
Timestamp:
2011-05-31T22:58:56Z (14 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
d362410
Parents:
82582e4 (diff), 4ce90544 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

Location:
kernel/arch/ia64
Files:
13 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/ia64/_link.ld.in

    r82582e4 rdf3c6f02  
    3030                hardcoded_kdata_size = .;
    3131                QUAD(kdata_end - kdata_start);
     32                __gp = .;
    3233                *(.got .got.*)
    3334                *(.sdata)

  • kernel/arch/ia64/include/arch.h

    r82582e4 rdf3c6f02  
    3636#define KERN_ia64_ARCH_H_
    3737
    38 #define LOADED_PROG_STACK_PAGES_NO 2
    39 
    4038#include <arch/drivers/ski.h>
    4139

  • kernel/arch/ia64/include/asm.h

    r82582e4 rdf3c6f02  
    122122}
    123123
    124 /** Return base address of current stack
    125  *
    126  * Return the base address of the current stack.
    127  * The stack is assumed to be STACK_SIZE long.
    128  * The stack must start on page boundary.
    129  *
     124/** Return base address of current memory stack.
     125 *
     126 * The memory stack is assumed to be STACK_SIZE / 2 long. Note that there is
     127 * also the RSE stack, which takes up the upper half of STACK_SIZE.
     128 * The memory stack must start on page boundary.
    130129 */
    131130NO_TRACE static inline uintptr_t get_stack_base(void)
    132131{
    133         uint64_t v;
    134        
    135         /*
    136          * I'm not sure why but this code inlines badly
    137          * in scheduler, resulting in THE shifting about
    138          * 16B and causing kernel panic.
    139          *
    140          * asm volatile (
    141          *     "and %[value] = %[mask], r12"
    142          *     : [value] "=r" (v)
    143          *     : [mask] "r" (~(STACK_SIZE - 1))
    144          * );
    145          * return v;
    146          *
    147          * The following code has the same semantics but
    148          * inlines correctly.
    149          *
    150          */
     132        uint64_t value;
    151133       
    152134        asm volatile (
    153135                "mov %[value] = r12"
    154                 : [value] "=r" (v)
    155         );
    156        
    157         return (v & (~(STACK_SIZE - 1)));
     136                : [value] "=r" (value)
     137        );
     138       
     139        return (value & (~(STACK_SIZE / 2 - 1)));
    158140}
    159141

  • kernel/arch/ia64/include/context.h

    r82582e4 rdf3c6f02  
    4949#define SP_DELTA        (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
    5050
    51 /* RSE stack starts at the bottom of memory stack. */
     51/* RSE stack starts at the bottom of memory stack, hence the division by 2. */
    5252#define context_set(c, _pc, stack, size)                                                                \
    5353        do {                                                                                            \
    5454                (c)->pc = (uintptr_t) _pc;                                                              \
    55                 (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size), REGISTER_STACK_ALIGNMENT);            \
     55                (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size / 2), REGISTER_STACK_ALIGNMENT);        \
    5656                (c)->ar_pfs &= PFM_MASK;                                                                \
    57                 (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - SP_DELTA;           \
     57                (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size / 2), STACK_ALIGNMENT) - SP_DELTA;       \
    5858        } while (0);
    5959

  • kernel/arch/ia64/include/mm/as.h

    r82582e4 rdf3c6f02  
    3838#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
    3939
    40 #define KERNEL_ADDRESS_SPACE_START_ARCH  ((unsigned long) 0xe000000000000000ULL)
    41 #define KERNEL_ADDRESS_SPACE_END_ARCH    ((unsigned long) 0xffffffffffffffffULL)
    42 #define USER_ADDRESS_SPACE_START_ARCH    ((unsigned long) 0x0000000000000000ULL)
    43 #define USER_ADDRESS_SPACE_END_ARCH      ((unsigned long) 0xdfffffffffffffffULL)
     40#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT64_C(0xe000000000000000)
     41#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT64_C(0xffffffffffffffff)
     42#define USER_ADDRESS_SPACE_START_ARCH    UINT64_C(0x0000000000000000)
     43#define USER_ADDRESS_SPACE_END_ARCH      UINT64_C(0xdfffffffffffffff)
    4444
    45 #define USTACK_ADDRESS_ARCH  0x0000000ff0000000ULL
     45#define USTACK_ADDRESS_ARCH  UINT64_C(0x0000000ff0000000)
    4646
    4747typedef struct {

  • kernel/arch/ia64/include/mm/frame.h

    r82582e4 rdf3c6f02  
    4949#define physmem_print()
    5050
    51 #define ARCH_STACK_FRAMES TWO_FRAMES
    52 
    5351#endif /* __ASM__ */
    5452#endif /* KERNEL */

  • kernel/arch/ia64/include/register.h

    r82582e4 rdf3c6f02  
    6060#define PSR_CPL_SHIFT         32
    6161#define PSR_CPL_MASK_SHIFTED  3
     62
     63#define PSR_RI_SHIFT    41
     64#define PSR_RI_LEN      2
    6265
    6366#define PFM_MASK  (~0x3fffffffff)

  • kernel/arch/ia64/include/types.h

    r82582e4 rdf3c6f02  
    3737
    3838typedef uint64_t size_t;
     39typedef int64_t ssize_t;
    3940
    4041typedef uint64_t uintptr_t;

  • kernel/arch/ia64/src/ia64.c

    r82582e4 rdf3c6f02  
    249249        rsc.mode = 3;                   /* eager mode */
    250250
     251        /*
     252         * Switch to userspace.
     253         *
     254         * When calculating stack addresses, mind the stack split between the
     255         * memory stack and the RSE stack. Each occuppies STACK_SIZE / 2 bytes.
     256         */
    251257        switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
    252             ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
     258            ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2 -
    253259            ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
    254             ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
     260            ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2,
    255261            (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
    256262

  • kernel/arch/ia64/src/ivt.S

    r82582e4 rdf3c6f02  
    5050#define R_KSTACK_BSP    r22     /* keep in sync with before_thread_runs_arch() */
    5151#define R_KSTACK        r23     /* keep in sync with before_thread_runs_arch() */
     52
     53/* Speculation vector handler */
     54.macro SPECULATION_VECTOR_HANDLER offs
     55    .org ivt + \offs
     56
     57    /* 1. Save predicates, IIM, IIP, IPSR and ISR CR's in bank 0 registers. */
     58        mov r16 = pr
     59        mov r17 = cr.iim
     60        mov r18 = cr.iip
     61        mov r19 = cr.ipsr
     62        mov r20 = cr.isr ;;
     63       
     64    /* 2. Move IIP to IIPA. */
     65        mov cr.iipa = r18
     66       
     67    /* 3. Sign extend IIM[20:0], shift left by 4 and add to IIP. */
     68        shl r17 = r17, 43 ;;    /* shift bit 20 to bit 63 */
     69        shr r17 = r17, 39 ;;    /* signed shift right to bit 24 */
     70        add r18 = r18, r17 ;;
     71        mov cr.iip = r18
     72       
     73    /* 4. Set IPSR.ri to 0. */
     74        dep r19 = 0, r19, PSR_RI_SHIFT, PSR_RI_LEN ;;
     75        mov cr.ipsr = r19
     76       
     77    /* 5. Check whether IPSR.tb or IPSR.ss is set. */
     78
     79        /* TODO:
     80         * Implement this when Taken Branch and Single Step traps can occur.
     81         */
     82   
     83    /* 6. Restore predicates and return from interruption. */
     84        mov pr = r16 ;;
     85        rfi
     86.endm
    5287
    5388/** Heavyweight interrupt handler
    … …  
    391426
    392427    /* 10. call handler */
    393         movl r1 = kernel_image_start
     428        movl r1 = __gp
    394429   
    395430        mov b1 = loc2
    … …  
    541576        HEAVYWEIGHT_HANDLER 0x5500 disabled_fp_register
    542577        HEAVYWEIGHT_HANDLER 0x5600
    543         HEAVYWEIGHT_HANDLER 0x5700
     578        SPECULATION_VECTOR_HANDLER 0x5700
    544579        HEAVYWEIGHT_HANDLER 0x5800
    545580        HEAVYWEIGHT_HANDLER 0x5900

  • kernel/arch/ia64/src/mm/tlb.c

    r82582e4 rdf3c6f02  
    481481       
    482482        page_table_lock(AS, true);
    483         t = page_mapping_find(AS, va);
     483        t = page_mapping_find(AS, va, true);
    484484        if (t) {
    485485                /*
    … …  
    599599       
    600600        page_table_lock(AS, true);
    601         pte_t *entry = page_mapping_find(AS, va);
     601        pte_t *entry = page_mapping_find(AS, va, true);
    602602        if (entry) {
    603603                /*
    … …  
    651651       
    652652        page_table_lock(AS, true);
    653         t = page_mapping_find(AS, va);
     653        t = page_mapping_find(AS, va, true);
    654654        ASSERT((t) && (t->p));
    655655        if ((t) && (t->p) && (t->w)) {
    … …  
    684684       
    685685        page_table_lock(AS, true);
    686         t = page_mapping_find(AS, va);
     686        t = page_mapping_find(AS, va, true);
    687687        ASSERT((t) && (t->p));
    688688        if ((t) && (t->p) && (t->x)) {
    … …  
    717717       
    718718        page_table_lock(AS, true);
    719         t = page_mapping_find(AS, va);
     719        t = page_mapping_find(AS, va, true);
    720720        ASSERT((t) && (t->p));
    721721        if ((t) && (t->p)) {
    … …  
    753753         */
    754754        page_table_lock(AS, true);
    755         t = page_mapping_find(AS, va);
     755        t = page_mapping_find(AS, va, true);
    756756        ASSERT((t) && (t->p));
    757757        ASSERT(!t->w);
    … …  
    778778       
    779779        page_table_lock(AS, true);
    780         t = page_mapping_find(AS, va);
     780        t = page_mapping_find(AS, va, true);
    781781        ASSERT(t);
    782782       

  • kernel/arch/ia64/src/proc/scheduler.c

    r82582e4 rdf3c6f02  
    7979         * Record address of kernel stack to bank 0 r23.
    8080         * These values will be found there after switch from userspace.
     81         *
     82         * Mind the 1:1 split of the entire STACK_SIZE long region between the
     83         * memory stack and the RSE stack.
    8184         */
    8285        asm volatile (
    … …  
    8689                "bsw.1\n"
    8790                :
    88                 : "r" (&THREAD->kstack[THREAD_STACK_SIZE]),
    89                   "r" (&THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA])
     91                : "r" (&THREAD->kstack[STACK_SIZE / 2]),
     92                  "r" (&THREAD->kstack[STACK_SIZE / 2 - SP_DELTA])
    9093                );
    9194}

  • kernel/arch/ia64/src/start.S

    r82582e4 rdf3c6f02  
    174174       
    175175        # Initialize gp (Global Pointer) register
    176         movl gp = kernel_image_start
     176        movl gp = __gp
    177177       
    178         #       
     178        #
    179179        # Initialize bootinfo on BSP.
    180180        #
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