Changeset ddcc8a0 in mainline for kernel/arch/mips32
- Timestamp:
- 2011-11-10T23:09:13Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 95e882d
- Parents:
- ec1c8e6
- Location:
- kernel/arch/mips32
- Files:
-
- 2 edited
-
include/mm/frame.h (modified) (1 diff)
-
src/mm/frame.c (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/mips32/include/mm/frame.h
rec1c8e6 rddcc8a0 41 41 #ifndef __ASM__ 42 42 43 extern void frame_arch_init(void); 43 extern void frame_low_arch_init(void); 44 extern void frame_high_arch_init(void); 44 45 extern void physmem_print(void); 45 46 -
kernel/arch/mips32/src/mm/frame.c
rec1c8e6 rddcc8a0 165 165 * 166 166 */ 167 void frame_ arch_init(void)167 void frame_low_arch_init(void) 168 168 { 169 169 ipl_t ipl = interrupts_disable(); … … 246 246 } 247 247 248 void frame_high_arch_init(void) 249 { 250 } 248 251 249 252 void physmem_print(void)
Note:
See TracChangeset
for help on using the changeset viewer.
