Changeset dc0b964 in mainline for kernel/arch/amd64/include


Ignore:
Timestamp:
2010-11-24T14:23:14Z (15 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
85369b1, b89e1d3
Parents:
8b3bff5
Message:
  • do not hardwire PRI??? formatting macros in the sources, use autotool to detect the correct values
  • use autotool to detect correct values for integer literal macros (UINT32_C, etc.)
  • start using portable UINT??_C style macros for integer constants
Location:
kernel/arch/amd64/include
Files:
9 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/amd64/include/context.h

    r8b3bff5 rdc0b964  
    2727 */
    2828
    29 /** @addtogroup amd64   
     29/** @addtogroup amd64
    3030 * @{
    3131 */
    … …  
    4444 * panic sooner or later
    4545 */
    46 #define SP_DELTA     16
     46#define SP_DELTA  16
    4747
    4848#define context_set(c, _pc, stack, size) \

  • kernel/arch/amd64/include/context_offset.h

    r8b3bff5 rdc0b964  
    3030#define KERN_amd64_CONTEXT_OFFSET_H_
    3131
    32 #define OFFSET_SP  0x0
    33 #define OFFSET_PC  0x8
    34 #define OFFSET_RBX 0x10
    35 #define OFFSET_RBP 0x18
    36 #define OFFSET_R12 0x20
    37 #define OFFSET_R13 0x28
    38 #define OFFSET_R14 0x30
    39 #define OFFSET_R15 0x38
     32#define OFFSET_SP   0x00
     33#define OFFSET_PC   0x08
     34#define OFFSET_RBX  0x10
     35#define OFFSET_RBP  0x18
     36#define OFFSET_R12  0x20
     37#define OFFSET_R13  0x28
     38#define OFFSET_R14  0x30
     39#define OFFSET_R15  0x38
    4040
    4141#ifdef KERNEL
    42 # define OFFSET_IPL 0x40
     42        #define OFFSET_IPL 0x40
    4343#else
    44 # define OFFSET_TLS 0x40
     44        #define OFFSET_TLS 0x40
    4545#endif
    4646
    4747#ifdef __ASM__
    4848
    49 # ctx: address of the structure with saved context 
     49# ctx: address of the structure with saved context
    5050# pc: return address
    5151.macro CONTEXT_SAVE_ARCH_CORE ctx:req pc:req
    … …  
    6161.endm
    6262
    63 # ctx: address of the structure with saved context 
     63# ctx: address of the structure with saved context
    6464.macro CONTEXT_RESTORE_ARCH_CORE ctx:req pc:req
    6565        movq OFFSET_R15(\ctx), %r15
    … …  
    6868        movq OFFSET_R12(\ctx), %r12
    6969        movq OFFSET_RBP(\ctx), %rbp
    70         movq OFFSET_RBX(\ctx), %rbx     
     70        movq OFFSET_RBX(\ctx), %rbx
    7171       
    7272        movq OFFSET_SP(\ctx), %rsp   # ctx->sp -> %rsp

  • kernel/arch/amd64/include/cpu.h

    r8b3bff5 rdc0b964  
    3636#define KERN_amd64_CPU_H_
    3737
    38 #define RFLAGS_CF       (1 << 0)
    39 #define RFLAGS_PF       (1 << 2)
    40 #define RFLAGS_AF       (1 << 4)
    41 #define RFLAGS_ZF       (1 << 6)
    42 #define RFLAGS_SF       (1 << 7)
    43 #define RFLAGS_TF       (1 << 8)
    44 #define RFLAGS_IF       (1 << 9)
    45 #define RFLAGS_DF       (1 << 10)
    46 #define RFLAGS_OF       (1 << 11)
    47 #define RFLAGS_NT       (1 << 14)
    48 #define RFLAGS_RF       (1 << 16)
     38#define RFLAGS_CF  (1 << 0)
     39#define RFLAGS_PF  (1 << 2)
     40#define RFLAGS_AF  (1 << 4)
     41#define RFLAGS_ZF  (1 << 6)
     42#define RFLAGS_SF  (1 << 7)
     43#define RFLAGS_TF  (1 << 8)
     44#define RFLAGS_IF  (1 << 9)
     45#define RFLAGS_DF  (1 << 10)
     46#define RFLAGS_OF  (1 << 11)
     47#define RFLAGS_NT  (1 << 14)
     48#define RFLAGS_RF  (1 << 16)
    4949
    5050#define EFER_MSR_NUM    0xc0000080

  • kernel/arch/amd64/include/debugger.h

    r8b3bff5 rdc0b964  
    4141
    4242/* Flags that are passed to breakpoint_add function */
    43 #define BKPOINT_INSTR       0x1
    44 #define BKPOINT_WRITE       0x2
    45 #define BKPOINT_READ_WRITE  0x4
     43#define BKPOINT_INSTR       0x1U
     44#define BKPOINT_WRITE       0x2U
     45#define BKPOINT_READ_WRITE  0x4U
    4646
    47 #define BKPOINT_CHECK_ZERO  0x8
     47#define BKPOINT_CHECK_ZERO  0x8U
    4848
    4949

  • kernel/arch/amd64/include/istate.h

    r8b3bff5 rdc0b964  
    3737
    3838#ifdef KERNEL
     39
    3940#include <typedefs.h>
    4041#include <trace.h>
    41 #else
     42
     43#else /* KERNEL */
     44
    4245#include <sys/types.h>
     46
    4347#define NO_TRACE
    44 #endif
     48
     49#endif /* KERNEL */
    4550
    4651/** This is passed to interrupt handlers */
    … …  
    6166        uint64_t r14;
    6267        uint64_t r15;
    63         uint64_t alignment;     /* align rbp_frame on multiple of 16 */
    64         uint64_t rbp_frame;     /* imitation of frame pointer linkage */
    65         uint64_t rip_frame;     /* imitation of return address linkage */
    66         uint64_t error_word;    /* real or fake error word */
     68        uint64_t alignment;   /* align rbp_frame on multiple of 16 */
     69        uint64_t rbp_frame;   /* imitation of frame pointer linkage */
     70        uint64_t rip_frame;   /* imitation of return address linkage */
     71        uint64_t error_word;  /* real or fake error word */
    6772        uint64_t rip;
    6873        uint64_t cs;
    6974        uint64_t rflags;
    70         uint64_t rsp;           /* only if istate_t is from uspace */
    71         uint64_t ss;            /* only if istate_t is from uspace */
     75        uint64_t rsp;         /* only if istate_t is from uspace */
     76        uint64_t ss;          /* only if istate_t is from uspace */
    7277} istate_t;
    7378
    … …  
    7580NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    7681{
    77         return !(istate->rip & 0x8000000000000000);
     82        return !(istate->rip & UINT64_C(0x8000000000000000));
    7883}
    7984

  • kernel/arch/amd64/include/mm/as.h

    r8b3bff5 rdc0b964  
    3636#define KERN_amd64_AS_H_
    3737
    38 #define ADDRESS_SPACE_HOLE_START        0x0000800000000000ULL
    39 #define ADDRESS_SPACE_HOLE_END          0xffff7fffffffffffULL
     38#define ADDRESS_SPACE_HOLE_START  UINT64_C(0x0000800000000000)
     39#define ADDRESS_SPACE_HOLE_END    UINT64_C(0xffff7fffffffffff)
    4040
    4141#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
    4242
    43 #define KERNEL_ADDRESS_SPACE_START_ARCH 0xffff800000000000ULL
    44 #define KERNEL_ADDRESS_SPACE_END_ARCH   0xffffffffffffffffULL
     43#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT64_C(0xffff800000000000)
     44#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT64_C(0xffffffffffffffff)
    4545
    46 #define USER_ADDRESS_SPACE_START_ARCH   0x0000000000000000ULL
    47 #define USER_ADDRESS_SPACE_END_ARCH     0x00007fffffffffffULL
     46#define USER_ADDRESS_SPACE_START_ARCH  UINT64_C(0x0000000000000000)
     47#define USER_ADDRESS_SPACE_END_ARCH    UINT64_C(0x00007fffffffffff)
    4848
    4949#define USTACK_ADDRESS_ARCH  (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1))

  • kernel/arch/amd64/include/mm/page.h

    r8b3bff5 rdc0b964  
    5555#ifndef __ASM__
    5656
    57 #define KA2PA(x)  (((uintptr_t) (x)) - 0xffff800000000000)
    58 #define PA2KA(x)  (((uintptr_t) (x)) + 0xffff800000000000)
     57#define KA2PA(x)  (((uintptr_t) (x)) - UINT64_C(0xffff800000000000))
     58#define PA2KA(x)  (((uintptr_t) (x)) + UINT64_C(0xffff800000000000))
    5959
    6060#else /* __ASM__ */
    … …  
    7878
    7979/* Macros calculating indices into page tables in each level. */
    80 #define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 39) & 0x1ff)
    81 #define PTL1_INDEX_ARCH(vaddr)  (((vaddr) >> 30) & 0x1ff)
    82 #define PTL2_INDEX_ARCH(vaddr)  (((vaddr) >> 21) & 0x1ff)
    83 #define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ff)
     80#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 39) & 0x1ffU)
     81#define PTL1_INDEX_ARCH(vaddr)  (((vaddr) >> 30) & 0x1ffU)
     82#define PTL2_INDEX_ARCH(vaddr)  (((vaddr) >> 21) & 0x1ffU)
     83#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ffU)
    8484
    8585/* Get PTE address accessors for each level. */
    … …  
    205205        pte_t *p = &pt[i];
    206206       
    207         p->addr_12_31 = (a >> 12) & 0xfffff;
     207        p->addr_12_31 = (a >> 12) & UINT32_C(0xfffff);
    208208        p->addr_32_51 = a >> 32;
    209209}

  • kernel/arch/amd64/include/pm.h

    r8b3bff5 rdc0b964  
    7575#define AR_WRITABLE   (1 << 1)
    7676#define AR_READABLE   (1 << 1)
    77 #define AR_TSS        (0x09)
    78 #define AR_INTERRUPT  (0x0e)
    79 #define AR_TRAP       (0x0f)
     77#define AR_TSS        (0x09U)
     78#define AR_INTERRUPT  (0x0eU)
     79#define AR_TRAP       (0x0fU)
    8080
    8181#define DPL_KERNEL  (PL_KERNEL << 5)

  • kernel/arch/amd64/include/types.h

    r8b3bff5 rdc0b964  
    5050} fncptr_t;
    5151
    52 /* Formats for uintptr_t, size_t */
    53 #define PRIp  "llx"
    54 #define PRIs  "llu"
    55 
    56 /* Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */
    57 #define PRId8   "d"
    58 #define PRId16  "d"
    59 #define PRId32  "d"
    60 #define PRId64  "lld"
    61 #define PRIdn   "lld"
    62 
    63 #define PRIu8   "u"
    64 #define PRIu16  "u"
    65 #define PRIu32  "u"
    66 #define PRIu64  "llu"
    67 #define PRIun   "llu"
    68 
    69 #define PRIx8   "x"
    70 #define PRIx16  "x"
    71 #define PRIx32  "x"
    72 #define PRIx64  "llx"
    73 #define PRIxn   "llx"
     52#define PRIp   PRIx64  /**< Format for uintptr_t. */
     53#define PRIs   PRIu64  /**< Format for size_t. */
     54#define PRIdn  PRId64  /**< Format for native_t. */
     55#define PRIun  PRIu64  /**< Format for unative_t. */
     56#define PRIxn  PRIx64  /**< Format for hexadecimal unative_t. */
    7457
    7558#endif
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