Changeset da1bafb in mainline for kernel/arch/sparc64/src


Ignore:
Timestamp:
2010-05-24T18:57:31Z (15 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
0095368
Parents:
666f492
Message:

major code revision

  • replace spinlocks taken with interrupts disabled with irq_spinlocks
  • change spacing (not indendation) to be tab-size independent
  • use unsigned integer types where appropriate (especially bit flags)
  • visual separation
  • remove argument names in function prototypes
  • string changes
  • correct some formating directives
  • replace various cryptic single-character variables (t, a, m, c, b, etc.) with proper identifiers (thread, task, timeout, as, itm, itc, etc.)
  • unify some assembler constructs
  • unused page table levels are now optimized out in compile time
  • replace several ints (with boolean semantics) with bools
  • use specifically sized types instead of generic types where appropriate (size_t, uint32_t, btree_key_t)
  • improve comments
  • split asserts with conjuction into multiple independent asserts
Location:
kernel/arch/sparc64/src
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/src/mm/sun4u/as.c

    r666f492 rda1bafb  
    4141
    4242#ifdef CONFIG_TSB
     43
    4344#include <arch/mm/tsb.h>
    4445#include <arch/memstr.h>
    … …  
    4748#include <bitops.h>
    4849#include <macros.h>
     50
    4951#endif /* CONFIG_TSB */
    5052
    … …  
    5860}
    5961
    60 int as_constructor_arch(as_t *as, int flags)
     62int as_constructor_arch(as_t *as, unsigned int flags)
    6163{
    6264#ifdef CONFIG_TSB
    … …  
    6466         * The order must be calculated with respect to the emulated
    6567         * 16K page size.
    66          */
    67         int order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
     68         *
     69         */
     70        uint8_t order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
    6871            sizeof(tsb_entry_t)) >> FRAME_WIDTH);
    69 
     72       
    7073        uintptr_t tsb = (uintptr_t) frame_alloc(order, flags | FRAME_KA);
    71 
     74       
    7275        if (!tsb)
    7376                return -1;
    74 
     77       
    7578        as->arch.itsb = (tsb_entry_t *) tsb;
    7679        as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT *
    7780            sizeof(tsb_entry_t));
    78 
     81       
    7982        memsetb(as->arch.itsb,
    8083            (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * sizeof(tsb_entry_t), 0);
    8184#endif
     85       
    8286        return 0;
    8387}
    … …  
    9397            sizeof(tsb_entry_t)) >> FRAME_WIDTH;
    9498        frame_free(KA2PA((uintptr_t) as->arch.itsb));
     99       
    95100        return cnt;
    96101#else
    … …  
    99104}
    100105
    101 int as_create_arch(as_t *as, int flags)
     106int as_create_arch(as_t *as, unsigned int flags)
    102107{
    103108#ifdef CONFIG_TSB
    104109        tsb_invalidate(as, 0, (size_t) -1);
    105110#endif
     111       
    106112        return 0;
    107113}
    … …  
    123129         *
    124130         * Moreover, the as->asid is protected by asidlock, which is being held.
     131         *
    125132         */
    126133       
    … …  
    130137         * secondary context register from the TL=1 code just before switch to
    131138         * userspace.
     139         *
    132140         */
    133141        ctx.v = 0;
    134142        ctx.context = as->asid;
    135143        mmu_secondary_context_write(ctx.v);
    136 
    137 #ifdef CONFIG_TSB       
     144       
     145#ifdef CONFIG_TSB
    138146        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    139 
     147       
    140148        ASSERT(as->arch.itsb && as->arch.dtsb);
    141 
     149       
    142150        uintptr_t tsb = (uintptr_t) as->arch.itsb;
    143                
     151       
    144152        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    145153                /*
    … …  
    147155                 * by the locked 4M kernel DTLB entry. We need
    148156                 * to map both TSBs explicitly.
     157                 *
    149158                 */
    150159                dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
    151160                dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
    152161        }
    153                
     162       
    154163        /*
    155164         * Setup TSB Base registers.
     165         *
    156166         */
    157167        tsb_base_reg_t tsb_base;
    158                
     168       
    159169        tsb_base.value = 0;
    160170        tsb_base.size = TSB_SIZE;
    161171        tsb_base.split = 0;
    162 
     172       
    163173        tsb_base.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;
    164174        itsb_base_write(tsb_base.value);
    … …  
    175185         * Clearing the extension registers will ensure that the value of the
    176186         * TSB Base register will be used as an address of TSB, making the code
    177          * compatible with the US port.
     187         * compatible with the US port.
     188         *
    178189         */
    179190        itsb_primary_extension_write(0);
    … …  
    195206void as_deinstall_arch(as_t *as)
    196207{
    197 
    198208        /*
    199209         * Note that we don't and may not lock the address space. That's ok
    … …  
    201211         *
    202212         * Moreover, the as->asid is protected by asidlock, which is being held.
    203          */
    204 
     213         *
     214         */
     215       
    205216#ifdef CONFIG_TSB
    206217        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    207 
     218       
    208219        ASSERT(as->arch.itsb && as->arch.dtsb);
    209 
     220       
    210221        uintptr_t tsb = (uintptr_t) as->arch.itsb;
    211                
     222       
    212223        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    213224                /*

  • kernel/arch/sparc64/src/mm/sun4v/as.c

    r666f492 rda1bafb  
    4444
    4545#ifdef CONFIG_TSB
     46
    4647#include <arch/mm/tsb.h>
    4748#include <arch/memstr.h>
    … …  
    5051#include <bitops.h>
    5152#include <macros.h>
     53
    5254#endif /* CONFIG_TSB */
    5355
    … …  
    6163}
    6264
    63 int as_constructor_arch(as_t *as, int flags)
     65int as_constructor_arch(as_t *as, unsigned int flags)
    6466{
    6567#ifdef CONFIG_TSB
    66         int order = fnzb32(
     68        uint8_t order = fnzb32(
    6769                (TSB_ENTRY_COUNT * sizeof(tsb_entry_t)) >> FRAME_WIDTH);
    68 
     70       
    6971        uintptr_t tsb = (uintptr_t) frame_alloc(order, flags);
    70 
     72       
    7173        if (!tsb)
    7274                return -1;
    73 
     75       
    7476        as->arch.tsb_description.page_size = PAGESIZE_8K;
    7577        as->arch.tsb_description.associativity = 1;
    … …  
    7981        as->arch.tsb_description.reserved = 0;
    8082        as->arch.tsb_description.context = 0;
    81 
     83       
    8284        memsetb((void *) PA2KA(as->arch.tsb_description.tsb_base),
    8385                TSB_ENTRY_COUNT * sizeof(tsb_entry_t), 0);
    8486#endif
     87       
    8588        return 0;
    8689}
    … …  
    9194        size_t cnt = (TSB_ENTRY_COUNT * sizeof(tsb_entry_t)) >> FRAME_WIDTH;
    9295        frame_free((uintptr_t) as->arch.tsb_description.tsb_base);
     96       
    9397        return cnt;
    9498#else
    … …  
    97101}
    98102
    99 int as_create_arch(as_t *as, int flags)
     103int as_create_arch(as_t *as, unsigned int flags)
    100104{
    101105#ifdef CONFIG_TSB
    102106        tsb_invalidate(as, 0, (size_t) -1);
    103107#endif
     108       
    104109        return 0;
    105110}
    … …  
    111116 *
    112117 * @param as Address space.
     118 *
    113119 */
    114120void as_install_arch(as_t *as)
    115121{
    116122        mmu_secondary_context_write(as->asid);
    117 #ifdef CONFIG_TSB       
     123       
     124#ifdef CONFIG_TSB
    118125        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    119 
     126       
    120127        ASSERT(as->arch.tsb_description.tsb_base);
    121128        uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base);
    122                
     129       
    123130        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    124131                /*
    … …  
    126133                 * by the locked 4M kernel DTLB entry. We need
    127134                 * to map both TSBs explicitly.
     135                 *
    128136                 */
    129137                mmu_demap_page(tsb, 0, MMU_FLAG_DTLB);
    130138                dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
    131139        }
    132 
     140       
    133141        __hypercall_fast2(MMU_TSB_CTXNON0, 1, KA2PA(&(as->arch.tsb_description)));
    134        
    135142#endif
    136143}
    … …  
    142149 *
    143150 * @param as Address space.
     151 *
    144152 */
    145153void as_deinstall_arch(as_t *as)
    146154{
    147 
    148155        /*
    149156         * Note that we don't and may not lock the address space. That's ok
    … …  
    151158         *
    152159         * Moreover, the as->asid is protected by asidlock, which is being held.
     160         *
    153161         */
    154 
     162       
    155163#ifdef CONFIG_TSB
    156164        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    157 
     165       
    158166        ASSERT(as->arch.tsb_description.tsb_base);
    159 
     167       
    160168        uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base);
    161                
     169       
    162170        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    163171                /*
    … …  
    165173                 * by the locked 4M kernel DTLB entry. We need
    166174                 * to demap the entry installed by as_install_arch().
     175                 *
    167176                 */
    168177                __hypercall_fast3(MMU_UNMAP_PERM_ADDR, tsb, 0, MMU_FLAG_DTLB);

  • kernel/arch/sparc64/src/trap/sun4u/interrupt.c

    r666f492 rda1bafb  
    5555void interrupt(int n, istate_t *istate)
    5656{
    57         uint64_t status;
    58         uint64_t intrcv;
    59         uint64_t data0;
    60         status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
     57        uint64_t status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
    6158        if (status & (!INTR_DISPATCH_STATUS_BUSY))
    6259                panic("Interrupt Dispatch Status busy bit not set\n");
    63 
    64         intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
     60       
     61        uint64_t intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
    6562#if defined (US)
    66         data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);
     63        uint64_t data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);
    6764#elif defined (US3)
    68         data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);
     65        uint64_t data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);
    6966#endif
    70 
     67       
    7168        irq_t *irq = irq_dispatch_and_lock(data0);
    7269        if (irq) {
    … …  
    7572                 */
    7673                irq->handler(irq);
     74               
    7775                /*
    7876                 * See if there is a clear-interrupt-routine and call it.
    7977                 */
    80                 if (irq->cir) {
     78                if (irq->cir)
    8179                        irq->cir(irq->cir_arg, irq->inr);
    82                 }
    83                 spinlock_unlock(&irq->lock);
     80               
     81                irq_spinlock_unlock(&irq->lock, false);
    8482        } else if (data0 > config.base) {
    8583                /*
    … …  
    9088                 */
    9189#ifdef CONFIG_SMP
    92                 if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {
     90                if (data0 == (uintptr_t) tlb_shootdown_ipi_recv)
    9391                        tlb_shootdown_ipi_recv();
    94                 }
    9592#endif
    9693        } else {
    … …  
    10198                printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64
    10299                    ", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);
     100#else
     101                (void) intrcv;
    103102#endif
    104103        }
    105 
     104       
    106105        membar();
    107106        asi_u64_write(ASI_INTR_RECEIVE, 0, 0);
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